xref: /openbmc/u-boot/arch/x86/include/asm/processor.h (revision ff6a8f3c06eab0f0afb65d5e5925eee9860f0add)
1 /*
2  * (C) Copyright 2002
3  * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef __ASM_PROCESSOR_H_
9 #define __ASM_PROCESSOR_H_ 1
10 
11 #define X86_GDT_ENTRY_SIZE		8
12 
13 #define X86_GDT_ENTRY_NULL		0
14 #define X86_GDT_ENTRY_UNUSED		1
15 #define X86_GDT_ENTRY_32BIT_CS		2
16 #define X86_GDT_ENTRY_32BIT_DS		3
17 #define X86_GDT_ENTRY_32BIT_FS		4
18 #define X86_GDT_ENTRY_16BIT_CS		5
19 #define X86_GDT_ENTRY_16BIT_DS		6
20 #define X86_GDT_ENTRY_16BIT_FLAT_CS	7
21 #define X86_GDT_ENTRY_16BIT_FLAT_DS	8
22 #define X86_GDT_NUM_ENTRIES		9
23 
24 #define X86_GDT_SIZE		(X86_GDT_NUM_ENTRIES * X86_GDT_ENTRY_SIZE)
25 
26 #ifndef __ASSEMBLY__
27 
28 /*
29  * This register is documented in (for example) the Intel Atom Processor E3800
30  * Product Family Datasheet in "PCU - Power Management Controller (PMC)".
31  *
32  * RST_CNT: Reset Control Register (RST_CNT) Offset cf9.
33  *
34  * The naming follows Intel's naming.
35  */
36 #define PORT_RESET		0xcf9
37 
38 enum {
39 	SYS_RST		= 1 << 1,	/* 0 for soft reset, 1 for hard reset */
40 	RST_CPU		= 1 << 2,	/* initiate reset */
41 	FULL_RST	= 1 << 3,	/* full power cycle */
42 };
43 
44 /**
45  * x86_full_reset() - reset everything: perform a full power cycle
46  */
47 void x86_full_reset(void);
48 
49 static inline __attribute__((always_inline)) void cpu_hlt(void)
50 {
51 	asm("hlt");
52 }
53 
54 static inline ulong cpu_get_sp(void)
55 {
56 	ulong result;
57 
58 	asm volatile(
59 		"mov %%esp, %%eax"
60 		: "=a" (result));
61 	return result;
62 }
63 
64 #endif /* __ASSEMBLY__ */
65 
66 #endif
67