xref: /openbmc/u-boot/arch/x86/dts/edison.dts (revision 6a08213d52f036dbfbdd92f1416bc4b08fd4d3f6)
183d290c5STom Rini// SPDX-License-Identifier: GPL-2.0+
2495f3774SAndy Shevchenko/*
3495f3774SAndy Shevchenko * Copyright (c) 2017 Intel Corporation
4495f3774SAndy Shevchenko */
5495f3774SAndy Shevchenko
6495f3774SAndy Shevchenko/dts-v1/;
7495f3774SAndy Shevchenko
8495f3774SAndy Shevchenko#include <dt-bindings/gpio/x86-gpio.h>
9495f3774SAndy Shevchenko#include <dt-bindings/interrupt-router/intel-irq.h>
10495f3774SAndy Shevchenko
11495f3774SAndy Shevchenko/include/ "skeleton.dtsi"
12495f3774SAndy Shevchenko/include/ "rtc.dtsi"
13495f3774SAndy Shevchenko/include/ "tsc_timer.dtsi"
14495f3774SAndy Shevchenko
15495f3774SAndy Shevchenko/ {
16495f3774SAndy Shevchenko	model = "Intel Edison";
17495f3774SAndy Shevchenko	compatible = "intel,edison";
18495f3774SAndy Shevchenko
19495f3774SAndy Shevchenko	aliases {
20*d9b59fc9SAndy Shevchenko		serial0 = &serial0;
21*d9b59fc9SAndy Shevchenko		serial1 = &serial1;
22ab83e5c1SAndy Shevchenko		serial2 = &serial2;
23495f3774SAndy Shevchenko	};
24495f3774SAndy Shevchenko
25495f3774SAndy Shevchenko	chosen {
26ab83e5c1SAndy Shevchenko		stdout-path = &serial2;
27495f3774SAndy Shevchenko	};
28495f3774SAndy Shevchenko
29495f3774SAndy Shevchenko	cpus {
30495f3774SAndy Shevchenko		#address-cells = <1>;
31495f3774SAndy Shevchenko		#size-cells = <0>;
32495f3774SAndy Shevchenko
33495f3774SAndy Shevchenko		cpu@0 {
34495f3774SAndy Shevchenko			device_type = "cpu";
35495f3774SAndy Shevchenko			compatible = "cpu-x86";
36495f3774SAndy Shevchenko			reg = <0>;
37495f3774SAndy Shevchenko			intel,apic-id = <0>;
38495f3774SAndy Shevchenko		};
39495f3774SAndy Shevchenko
40495f3774SAndy Shevchenko		cpu@1 {
41495f3774SAndy Shevchenko			device_type = "cpu";
42495f3774SAndy Shevchenko			compatible = "cpu-x86";
43495f3774SAndy Shevchenko			reg = <1>;
44495f3774SAndy Shevchenko			intel,apic-id = <2>;
45495f3774SAndy Shevchenko		};
46495f3774SAndy Shevchenko	};
47495f3774SAndy Shevchenko
48495f3774SAndy Shevchenko	pci {
49495f3774SAndy Shevchenko		compatible = "pci-x86";
50495f3774SAndy Shevchenko		#address-cells = <3>;
51495f3774SAndy Shevchenko		#size-cells = <2>;
52495f3774SAndy Shevchenko		u-boot,dm-pre-reloc;
53495f3774SAndy Shevchenko		ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000
54495f3774SAndy Shevchenko			  0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000
55495f3774SAndy Shevchenko			  0x01000000 0x0 0x2000 0x2000 0 0xe000>;
56495f3774SAndy Shevchenko	};
57495f3774SAndy Shevchenko
58*d9b59fc9SAndy Shevchenko	serial0: serial@ff010080 {
59*d9b59fc9SAndy Shevchenko		compatible = "intel,mid-uart";
60*d9b59fc9SAndy Shevchenko		reg = <0xff010080 0x100>;
61*d9b59fc9SAndy Shevchenko		reg-shift = <0>;
62*d9b59fc9SAndy Shevchenko		clock-frequency = <29491200>;
63*d9b59fc9SAndy Shevchenko		current-speed = <115200>;
64*d9b59fc9SAndy Shevchenko	};
65*d9b59fc9SAndy Shevchenko
66*d9b59fc9SAndy Shevchenko	serial1: serial@ff010100 {
67*d9b59fc9SAndy Shevchenko		compatible = "intel,mid-uart";
68*d9b59fc9SAndy Shevchenko		reg = <0xff010100 0x100>;
69*d9b59fc9SAndy Shevchenko		reg-shift = <0>;
70*d9b59fc9SAndy Shevchenko		clock-frequency = <29491200>;
71*d9b59fc9SAndy Shevchenko		current-speed = <115200>;
72*d9b59fc9SAndy Shevchenko	};
73*d9b59fc9SAndy Shevchenko
74ab83e5c1SAndy Shevchenko	serial2: serial@ff010180 {
75495f3774SAndy Shevchenko		compatible = "intel,mid-uart";
76495f3774SAndy Shevchenko		reg = <0xff010180 0x100>;
77495f3774SAndy Shevchenko		reg-shift = <0>;
78495f3774SAndy Shevchenko		clock-frequency = <29491200>;
79495f3774SAndy Shevchenko		current-speed = <115200>;
80495f3774SAndy Shevchenko	};
81495f3774SAndy Shevchenko
82495f3774SAndy Shevchenko	emmc: mmc@ff3fc000 {
83495f3774SAndy Shevchenko		compatible = "intel,sdhci-tangier";
84495f3774SAndy Shevchenko		reg = <0xff3fc000 0x1000>;
85495f3774SAndy Shevchenko	};
86495f3774SAndy Shevchenko
87495f3774SAndy Shevchenko/*
88495f3774SAndy Shevchenko * FIXME: For now U-Boot DM model doesn't allow to power up this controller.
89495f3774SAndy Shevchenko * Enabling it will make U-Boot hang.
90495f3774SAndy Shevchenko *
91495f3774SAndy Shevchenko	sdcard: mmc@ff3fa000 {
92495f3774SAndy Shevchenko		compatible = "intel,sdhci-tangier";
93495f3774SAndy Shevchenko		reg = <0xff3fa000 0x1000>;
94495f3774SAndy Shevchenko	};
95495f3774SAndy Shevchenko */
96495f3774SAndy Shevchenko
97495f3774SAndy Shevchenko	pmu: power@ff00b000 {
98495f3774SAndy Shevchenko		compatible = "intel,pmu-mid";
99495f3774SAndy Shevchenko		reg = <0xff00b000 0x1000>;
100495f3774SAndy Shevchenko	};
101495f3774SAndy Shevchenko
102495f3774SAndy Shevchenko	scu: ipc@ff009000 {
103495f3774SAndy Shevchenko		compatible = "intel,scu-ipc";
104495f3774SAndy Shevchenko		reg = <0xff009000 0x1000>;
105495f3774SAndy Shevchenko	};
106b37b7b20SBin Meng
107b37b7b20SBin Meng	reset {
108b37b7b20SBin Meng		compatible = "intel,reset-tangier";
109b37b7b20SBin Meng		u-boot,dm-pre-reloc;
110b37b7b20SBin Meng	};
111f26b260cSGeorgii Staroselskii
112f26b260cSGeorgii Staroselskii	pinctrl {
113f26b260cSGeorgii Staroselskii		compatible = "intel,pinctrl-tangier";
114f26b260cSGeorgii Staroselskii		reg = <0xff0c0000 0x8000>;
115f26b260cSGeorgii Staroselskii
116f26b260cSGeorgii Staroselskii		/*
117f26b260cSGeorgii Staroselskii		 * Initial configuration came from the firmware.
118f26b260cSGeorgii Staroselskii		 * Which quite likely has been used in the phones, where I2C #8,
119f26b260cSGeorgii Staroselskii		 * that is not part of Atom peripheral, is in use.
120f26b260cSGeorgii Staroselskii		 * Thus we need to override the leftover.
121f26b260cSGeorgii Staroselskii		 */
122f26b260cSGeorgii Staroselskii		i2c6_scl@0 {
123f26b260cSGeorgii Staroselskii			pad-offset = <111>;
124f26b260cSGeorgii Staroselskii			mode-func = <1>;
125f26b260cSGeorgii Staroselskii			protected;
126f26b260cSGeorgii Staroselskii		};
127f26b260cSGeorgii Staroselskii		i2c6_sda@0 {
128f26b260cSGeorgii Staroselskii			pad-offset = <112>;
129f26b260cSGeorgii Staroselskii			mode-func = <1>;
130f26b260cSGeorgii Staroselskii			protected;
131f26b260cSGeorgii Staroselskii		};
132f26b260cSGeorgii Staroselskii	};
133495f3774SAndy Shevchenko};
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