1819833afSPeter Tyser #ifndef __ASM_SH_CACHE_H 2819833afSPeter Tyser #define __ASM_SH_CACHE_H 3819833afSPeter Tyser 4819833afSPeter Tyser #if defined(CONFIG_SH4) || defined(CONFIG_SH4A) 5819833afSPeter Tyser 6819833afSPeter Tyser int cache_control(unsigned int cmd); 7819833afSPeter Tyser 8819833afSPeter Tyser #define L1_CACHE_BYTES 32 9*2482e3c8SAnton Staaf 10819833afSPeter Tyser struct __large_struct { unsigned long buf[100]; }; 11819833afSPeter Tyser #define __m(x) (*(struct __large_struct *)(x)) 12819833afSPeter Tyser 13819833afSPeter Tyser void dcache_wback_range(u32 start, u32 end) 14819833afSPeter Tyser { 15819833afSPeter Tyser u32 v; 16819833afSPeter Tyser 17819833afSPeter Tyser start &= ~(L1_CACHE_BYTES - 1); 18819833afSPeter Tyser for (v = start; v < end; v += L1_CACHE_BYTES) { 19819833afSPeter Tyser asm volatile ("ocbwb %0" : /* no output */ 20819833afSPeter Tyser : "m" (__m(v))); 21819833afSPeter Tyser } 22819833afSPeter Tyser } 23819833afSPeter Tyser 24819833afSPeter Tyser void dcache_invalid_range(u32 start, u32 end) 25819833afSPeter Tyser { 26819833afSPeter Tyser u32 v; 27819833afSPeter Tyser 28819833afSPeter Tyser start &= ~(L1_CACHE_BYTES - 1); 29819833afSPeter Tyser for (v = start; v < end; v += L1_CACHE_BYTES) { 30819833afSPeter Tyser asm volatile ("ocbi %0" : /* no output */ 31819833afSPeter Tyser : "m" (__m(v))); 32819833afSPeter Tyser } 33819833afSPeter Tyser } 34*2482e3c8SAnton Staaf #else 35*2482e3c8SAnton Staaf 36*2482e3c8SAnton Staaf /* 37*2482e3c8SAnton Staaf * 32-bytes is the largest L1 data cache line size for SH the architecture. So 38*2482e3c8SAnton Staaf * it is a safe default for DMA alignment. 39*2482e3c8SAnton Staaf */ 40*2482e3c8SAnton Staaf #define ARCH_DMA_MINALIGN 32 41*2482e3c8SAnton Staaf 42819833afSPeter Tyser #endif /* CONFIG_SH4 || CONFIG_SH4A */ 43819833afSPeter Tyser 44*2482e3c8SAnton Staaf /* 45*2482e3c8SAnton Staaf * Use the L1 data cache line size value for the minimum DMA buffer alignment 46*2482e3c8SAnton Staaf * on SH. 47*2482e3c8SAnton Staaf */ 48*2482e3c8SAnton Staaf #ifndef ARCH_DMA_MINALIGN 49*2482e3c8SAnton Staaf #define ARCH_DMA_MINALIGN L1_CACHE_BYTES 50*2482e3c8SAnton Staaf #endif 51*2482e3c8SAnton Staaf 52819833afSPeter Tyser #endif /* __ASM_SH_CACHE_H */ 53