1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2017 Andes Technology Corporation 4 * Rick Chen, Andes Technology Corporation <rick@andestech.com> 5 * 6 */ 7 #ifndef __ASM_RISCV_IO_H 8 #define __ASM_RISCV_IO_H 9 10 #ifdef __KERNEL__ 11 12 #include <linux/types.h> 13 #include <asm/barrier.h> 14 #include <asm/byteorder.h> 15 16 static inline void sync(void) 17 { 18 } 19 20 /* 21 * Given a physical address and a length, return a virtual address 22 * that can be used to access the memory range with the caching 23 * properties specified by "flags". 24 */ 25 #define MAP_NOCACHE (0) 26 #define MAP_WRCOMBINE (0) 27 #define MAP_WRBACK (0) 28 #define MAP_WRTHROUGH (0) 29 30 #ifdef CONFIG_ARCH_MAP_SYSMEM 31 static inline void *map_sysmem(phys_addr_t paddr, unsigned long len) 32 { 33 if (paddr < PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE) 34 paddr = paddr | 0x40000000; 35 return (void *)(uintptr_t)paddr; 36 } 37 38 static inline void *unmap_sysmem(const void *vaddr) 39 { 40 phys_addr_t paddr = (phys_addr_t)vaddr; 41 42 paddr = paddr & ~0x40000000; 43 return (void *)(uintptr_t)paddr; 44 } 45 46 static inline phys_addr_t map_to_sysmem(const void *ptr) 47 { 48 return (phys_addr_t)(uintptr_t)ptr; 49 } 50 #endif 51 52 static inline void * 53 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) 54 { 55 return (void *)paddr; 56 } 57 58 /* 59 * Take down a mapping set up by map_physmem(). 60 */ 61 static inline void unmap_physmem(void *vaddr, unsigned long flags) 62 { 63 } 64 65 static inline phys_addr_t virt_to_phys(void *vaddr) 66 { 67 return (phys_addr_t)(vaddr); 68 } 69 70 /* 71 * Generic virtual read/write. Note that we don't support half-word 72 * read/writes. We define __arch_*[bl] here, and leave __arch_*w 73 * to the architecture specific code. 74 */ 75 #define __arch_getb(a) (*(unsigned char *)(a)) 76 #define __arch_getw(a) (*(unsigned short *)(a)) 77 #define __arch_getl(a) (*(unsigned int *)(a)) 78 #define __arch_getq(a) (*(unsigned long long *)(a)) 79 80 #define __arch_putb(v, a) (*(unsigned char *)(a) = (v)) 81 #define __arch_putw(v, a) (*(unsigned short *)(a) = (v)) 82 #define __arch_putl(v, a) (*(unsigned int *)(a) = (v)) 83 #define __arch_putq(v, a) (*(unsigned long long *)(a) = (v)) 84 85 #define __raw_writeb(v, a) __arch_putb(v, a) 86 #define __raw_writew(v, a) __arch_putw(v, a) 87 #define __raw_writel(v, a) __arch_putl(v, a) 88 #define __raw_writeq(v, a) __arch_putq(v, a) 89 90 #define __raw_readb(a) __arch_getb(a) 91 #define __raw_readw(a) __arch_getw(a) 92 #define __raw_readl(a) __arch_getl(a) 93 #define __raw_readq(a) __arch_getq(a) 94 95 #define dmb() mb() 96 #define __iormb() rmb() 97 #define __iowmb() wmb() 98 99 static inline void writeb(u8 val, volatile void __iomem *addr) 100 { 101 __iowmb(); 102 __arch_putb(val, addr); 103 } 104 105 static inline void writew(u16 val, volatile void __iomem *addr) 106 { 107 __iowmb(); 108 __arch_putw(val, addr); 109 } 110 111 static inline void writel(u32 val, volatile void __iomem *addr) 112 { 113 __iowmb(); 114 __arch_putl(val, addr); 115 } 116 117 static inline void writeq(u64 val, volatile void __iomem *addr) 118 { 119 __iowmb(); 120 __arch_putq(val, addr); 121 } 122 123 static inline u8 readb(const volatile void __iomem *addr) 124 { 125 u8 val; 126 127 val = __arch_getb(addr); 128 __iormb(); 129 return val; 130 } 131 132 static inline u16 readw(const volatile void __iomem *addr) 133 { 134 u16 val; 135 136 val = __arch_getw(addr); 137 __iormb(); 138 return val; 139 } 140 141 static inline u32 readl(const volatile void __iomem *addr) 142 { 143 u32 val; 144 145 val = __arch_getl(addr); 146 __iormb(); 147 return val; 148 } 149 150 static inline u64 readq(const volatile void __iomem *addr) 151 { 152 u64 val; 153 154 val = __arch_getq(addr); 155 __iormb(); 156 return val; 157 } 158 159 /* 160 * The compiler seems to be incapable of optimising constants 161 * properly. Spell it out to the compiler in some cases. 162 * These are only valid for small values of "off" (< 1<<12) 163 */ 164 #define __raw_base_writeb(val, base, off) __arch_base_putb(val, base, off) 165 #define __raw_base_writew(val, base, off) __arch_base_putw(val, base, off) 166 #define __raw_base_writel(val, base, off) __arch_base_putl(val, base, off) 167 168 #define __raw_base_readb(base, off) __arch_base_getb(base, off) 169 #define __raw_base_readw(base, off) __arch_base_getw(base, off) 170 #define __raw_base_readl(base, off) __arch_base_getl(base, off) 171 172 #define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a) 173 #define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a)) 174 175 #define out_le32(a, v) out_arch(l, le32, a, v) 176 #define out_le16(a, v) out_arch(w, le16, a, v) 177 178 #define in_le32(a) in_arch(l, le32, a) 179 #define in_le16(a) in_arch(w, le16, a) 180 181 #define out_be32(a, v) out_arch(l, be32, a, v) 182 #define out_be16(a, v) out_arch(w, be16, a, v) 183 184 #define in_be32(a) in_arch(l, be32, a) 185 #define in_be16(a) in_arch(w, be16, a) 186 187 #define out_8(a, v) __raw_writeb(v, a) 188 #define in_8(a) __raw_readb(a) 189 190 /* 191 * Clear and set bits in one shot. These macros can be used to clear and 192 * set multiple bits in a register using a single call. These macros can 193 * also be used to set a multiple-bit bit pattern using a mask, by 194 * specifying the mask in the 'clear' parameter and the new bit pattern 195 * in the 'set' parameter. 196 */ 197 198 #define clrbits(type, addr, clear) \ 199 out_##type((addr), in_##type(addr) & ~(clear)) 200 201 #define setbits(type, addr, set) \ 202 out_##type((addr), in_##type(addr) | (set)) 203 204 #define clrsetbits(type, addr, clear, set) \ 205 out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) 206 207 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear) 208 #define setbits_be32(addr, set) setbits(be32, addr, set) 209 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) 210 211 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear) 212 #define setbits_le32(addr, set) setbits(le32, addr, set) 213 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) 214 215 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear) 216 #define setbits_be16(addr, set) setbits(be16, addr, set) 217 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) 218 219 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear) 220 #define setbits_le16(addr, set) setbits(le16, addr, set) 221 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) 222 223 #define clrbits_8(addr, clear) clrbits(8, addr, clear) 224 #define setbits_8(addr, set) setbits(8, addr, set) 225 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) 226 227 /* 228 * Now, pick up the machine-defined IO definitions 229 * #include <asm/arch/io.h> 230 */ 231 232 /* 233 * IO port access primitives 234 * ------------------------- 235 * 236 * The NDS32 doesn't have special IO access instructions just like ARM; 237 * all IO is memory mapped. 238 * Note that these are defined to perform little endian accesses 239 * only. Their primary purpose is to access PCI and ISA peripherals. 240 * 241 * Note that for a big endian machine, this implies that the following 242 * big endian mode connectivity is in place, as described by numerious 243 * ARM documents: 244 * 245 * PCI: D0-D7 D8-D15 D16-D23 D24-D31 246 * ARM: D24-D31 D16-D23 D8-D15 D0-D7 247 * 248 * The machine specific io.h include defines __io to translate an "IO" 249 * address to a memory address. 250 * 251 * Note that we prevent GCC re-ordering or caching values in expressions 252 * by introducing sequence points into the in*() definitions. Note that 253 * __raw_* do not guarantee this behaviour. 254 * 255 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space. 256 */ 257 #ifdef __io 258 #define outb(v, p) __raw_writeb(v, __io(p)) 259 #define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p)) 260 #define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p)) 261 262 #define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; }) 263 #define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; }) 264 #define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; }) 265 266 #define outsb(p, d, l) writesb(__io(p), d, l) 267 #define outsw(p, d, l) writesw(__io(p), d, l) 268 #define outsl(p, d, l) writesl(__io(p), d, l) 269 270 #define insb(p, d, l) readsb(__io(p), d, l) 271 #define insw(p, d, l) readsw(__io(p), d, l) 272 #define insl(p, d, l) readsl(__io(p), d, l) 273 274 static inline void readsb(unsigned int *addr, void *data, int bytelen) 275 { 276 unsigned char *ptr; 277 unsigned char *ptr2; 278 279 ptr = (unsigned char *)addr; 280 ptr2 = (unsigned char *)data; 281 282 while (bytelen) { 283 *ptr2 = *ptr; 284 ptr2++; 285 bytelen--; 286 } 287 } 288 289 static inline void readsw(unsigned int *addr, void *data, int wordlen) 290 { 291 unsigned short *ptr; 292 unsigned short *ptr2; 293 294 ptr = (unsigned short *)addr; 295 ptr2 = (unsigned short *)data; 296 297 while (wordlen) { 298 *ptr2 = *ptr; 299 ptr2++; 300 wordlen--; 301 } 302 } 303 304 static inline void readsl(unsigned int *addr, void *data, int longlen) 305 { 306 unsigned int *ptr; 307 unsigned int *ptr2; 308 309 ptr = (unsigned int *)addr; 310 ptr2 = (unsigned int *)data; 311 312 while (longlen) { 313 *ptr2 = *ptr; 314 ptr2++; 315 longlen--; 316 } 317 } 318 319 static inline void writesb(unsigned int *addr, const void *data, int bytelen) 320 { 321 unsigned char *ptr; 322 unsigned char *ptr2; 323 324 ptr = (unsigned char *)addr; 325 ptr2 = (unsigned char *)data; 326 327 while (bytelen) { 328 *ptr = *ptr2; 329 ptr2++; 330 bytelen--; 331 } 332 } 333 334 static inline void writesw(unsigned int *addr, const void *data, int wordlen) 335 { 336 unsigned short *ptr; 337 unsigned short *ptr2; 338 339 ptr = (unsigned short *)addr; 340 ptr2 = (unsigned short *)data; 341 342 while (wordlen) { 343 *ptr = *ptr2; 344 ptr2++; 345 wordlen--; 346 } 347 } 348 349 static inline void writesl(unsigned int *addr, const void *data, int longlen) 350 { 351 unsigned int *ptr; 352 unsigned int *ptr2; 353 354 ptr = (unsigned int *)addr; 355 ptr2 = (unsigned int *)data; 356 357 while (longlen) { 358 *ptr = *ptr2; 359 ptr2++; 360 longlen--; 361 } 362 } 363 #endif 364 365 #define outb_p(val, port) outb((val), (port)) 366 #define outw_p(val, port) outw((val), (port)) 367 #define outl_p(val, port) outl((val), (port)) 368 #define inb_p(port) inb((port)) 369 #define inw_p(port) inw((port)) 370 #define inl_p(port) inl((port)) 371 372 #define outsb_p(port, from, len) outsb(port, from, len) 373 #define outsw_p(port, from, len) outsw(port, from, len) 374 #define outsl_p(port, from, len) outsl(port, from, len) 375 #define insb_p(port, to, len) insb(port, to, len) 376 #define insw_p(port, to, len) insw(port, to, len) 377 #define insl_p(port, to, len) insl(port, to, len) 378 379 /* 380 * DMA-consistent mapping functions. These allocate/free a region of 381 * uncached, unwrite-buffered mapped memory space for use with DMA 382 * devices. This is the "generic" version. The PCI specific version 383 * is in pci.h 384 */ 385 386 /* 387 * String version of IO memory access ops: 388 */ 389 390 /* 391 * If this architecture has PCI memory IO, then define the read/write 392 * macros. These should only be used with the cookie passed from 393 * ioremap. 394 */ 395 #ifdef __mem_pci 396 397 #define readb(c) ({ unsigned int __v = \ 398 __raw_readb(__mem_pci(c)); __v; }) 399 #define readw(c) ({ unsigned int __v = \ 400 le16_to_cpu(__raw_readw(__mem_pci(c))); __v; }) 401 #define readl(c) ({ unsigned int __v = \ 402 le32_to_cpu(__raw_readl(__mem_pci(c))); __v; }) 403 404 #define writeb(v, c) __raw_writeb(v, __mem_pci(c)) 405 #define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c)) 406 #define writel(v, c) __raw_writel(cpu_to_le32(v), __mem_pci(c)) 407 408 #define memset_io(c, v, l) _memset_io(__mem_pci(c), (v), (l)) 409 #define memcpy_fromio(a, c, l) _memcpy_fromio((a), __mem_pci(c), (l)) 410 #define memcpy_toio(c, a, l) _memcpy_toio(__mem_pci(c), (a), (l)) 411 412 #define eth_io_copy_and_sum(s, c, l, b) \ 413 eth_copy_and_sum((s), __mem_pci(c), (l), (b)) 414 415 static inline int check_signature(ulong io_addr, const uchar *s, int len) 416 { 417 int retval = 0; 418 419 do { 420 if (readb(io_addr) != *s) 421 goto out; 422 io_addr++; 423 s++; 424 len--; 425 } while (len); 426 retval = 1; 427 out: 428 return retval; 429 } 430 #endif /* __mem_pci */ 431 432 /* 433 * If this architecture has ISA IO, then define the isa_read/isa_write 434 * macros. 435 */ 436 #ifdef __mem_isa 437 438 #define isa_readb(addr) __raw_readb(__mem_isa(addr)) 439 #define isa_readw(addr) __raw_readw(__mem_isa(addr)) 440 #define isa_readl(addr) __raw_readl(__mem_isa(addr)) 441 #define isa_writeb(val, addr) __raw_writeb(val, __mem_isa(addr)) 442 #define isa_writew(val, addr) __raw_writew(val, __mem_isa(addr)) 443 #define isa_writel(val, addr) __raw_writel(val, __mem_isa(addr)) 444 #define isa_memset_io(a, b, c) _memset_io(__mem_isa(a), (b), (c)) 445 #define isa_memcpy_fromio(a, b, c) _memcpy_fromio((a), __mem_isa(b), (c)) 446 #define isa_memcpy_toio(a, b, c) _memcpy_toio(__mem_isa((a)), (b), (c)) 447 448 #define isa_eth_io_copy_and_sum(a, b, c, d) \ 449 eth_copy_and_sum((a), __mem_isa(b), (c), (d)) 450 451 static inline int 452 isa_check_signature(ulong io_addr, const uchar *s, int len) 453 { 454 int retval = 0; 455 456 do { 457 if (isa_readb(io_addr) != *s) 458 goto out; 459 io_addr++; 460 s++; 461 len--; 462 } while (len); 463 retval = 1; 464 out: 465 return retval; 466 } 467 468 #else /* __mem_isa */ 469 470 #define isa_readb(addr) (__readwrite_bug("isa_readb"), 0) 471 #define isa_readw(addr) (__readwrite_bug("isa_readw"), 0) 472 #define isa_readl(addr) (__readwrite_bug("isa_readl"), 0) 473 #define isa_writeb(val, addr) __readwrite_bug("isa_writeb") 474 #define isa_writew(val, addr) __readwrite_bug("isa_writew") 475 #define isa_writel(val, addr) __readwrite_bug("isa_writel") 476 #define isa_memset_io(a, b, c) __readwrite_bug("isa_memset_io") 477 #define isa_memcpy_fromio(a, b, c) __readwrite_bug("isa_memcpy_fromio") 478 #define isa_memcpy_toio(a, b, c) __readwrite_bug("isa_memcpy_toio") 479 480 #define isa_eth_io_copy_and_sum(a, b, c, d) \ 481 __readwrite_bug("isa_eth_io_copy_and_sum") 482 483 #define isa_check_signature(io, sig, len) (0) 484 485 #endif /* __mem_isa */ 486 #endif /* __KERNEL__ */ 487 #endif /* __ASM_RISCV_IO_H */ 488