1menu "RISC-V architecture" 2 depends on RISCV 3 4config SYS_ARCH 5 default "riscv" 6 7choice 8 prompt "Target select" 9 optional 10 11config TARGET_AX25_AE350 12 bool "Support ax25-ae350" 13 14config TARGET_QEMU_VIRT 15 bool "Support QEMU Virt Board" 16 17endchoice 18 19source "board/AndesTech/ax25-ae350/Kconfig" 20source "board/emulation/qemu-riscv/Kconfig" 21 22choice 23 prompt "Base ISA" 24 default ARCH_RV32I 25 26config ARCH_RV32I 27 bool "RV32I" 28 select 32BIT 29 help 30 Choose this option to target the RV32I base integer instruction set. 31 32config ARCH_RV64I 33 bool "RV64I" 34 select 64BIT 35 select PHYS_64BIT 36 help 37 Choose this option to target the RV64I base integer instruction set. 38 39endchoice 40 41config RISCV_ISA_C 42 bool "Emit compressed instructions" 43 default y 44 help 45 Adds "C" to the ISA subsets that the toolchain is allowed to emit 46 when building U-Boot, which results in compressed instructions in the 47 U-Boot binary. 48 49config RISCV_ISA_A 50 def_bool y 51 52config 32BIT 53 bool 54 55config 64BIT 56 bool 57 58endmenu 59