xref: /openbmc/u-boot/arch/powerpc/cpu/mpc8xxx/pamu_table.c (revision f698e9f39aaf8ed30dab86f0130ea1e21bc721cc)
1*f698e9f3SAneesh Bansal /*
2*f698e9f3SAneesh Bansal  * Copyright 2012-2016 Freescale Semiconductor, Inc.
3*f698e9f3SAneesh Bansal  *
4*f698e9f3SAneesh Bansal  * SPDX-License-Identifier:	GPL-2.0+
5*f698e9f3SAneesh Bansal  */
6*f698e9f3SAneesh Bansal 
7*f698e9f3SAneesh Bansal #include <common.h>
8*f698e9f3SAneesh Bansal #include <asm/fsl_pamu.h>
9*f698e9f3SAneesh Bansal 
10*f698e9f3SAneesh Bansal DECLARE_GLOBAL_DATA_PTR;
11*f698e9f3SAneesh Bansal 
12*f698e9f3SAneesh Bansal void construct_pamu_addr_table(struct pamu_addr_tbl *tbl, int *num_entries)
13*f698e9f3SAneesh Bansal {
14*f698e9f3SAneesh Bansal 	int i = 0;
15*f698e9f3SAneesh Bansal 	int j;
16*f698e9f3SAneesh Bansal 
17*f698e9f3SAneesh Bansal 	tbl->start_addr[i] =
18*f698e9f3SAneesh Bansal 			(uint64_t)virt_to_phys((void *)CONFIG_SYS_SDRAM_BASE);
19*f698e9f3SAneesh Bansal 	tbl->size[i] = (phys_size_t)(min(gd->ram_size, CONFIG_MAX_MEM_MAPPED));
20*f698e9f3SAneesh Bansal 	tbl->end_addr[i] = tbl->start_addr[i] +  tbl->size[i] - 1;
21*f698e9f3SAneesh Bansal 
22*f698e9f3SAneesh Bansal 	i++;
23*f698e9f3SAneesh Bansal #ifdef CONFIG_SYS_FLASH_BASE_PHYS
24*f698e9f3SAneesh Bansal 	tbl->start_addr[i] =
25*f698e9f3SAneesh Bansal 		(uint64_t)virt_to_phys((void *)CONFIG_SYS_FLASH_BASE_PHYS);
26*f698e9f3SAneesh Bansal 	tbl->size[i] = 256 * 1024 * 1024; /* 256MB flash */
27*f698e9f3SAneesh Bansal 	tbl->end_addr[i] = tbl->start_addr[i] +  tbl->size[i] - 1;
28*f698e9f3SAneesh Bansal 
29*f698e9f3SAneesh Bansal 	i++;
30*f698e9f3SAneesh Bansal #endif
31*f698e9f3SAneesh Bansal 	debug("PAMU address\t\t\tsize\n");
32*f698e9f3SAneesh Bansal 	for (j = 0; j < i ; j++)
33*f698e9f3SAneesh Bansal 		debug("%llx \t\t\t%llx\n",  tbl->start_addr[j],  tbl->size[j]);
34*f698e9f3SAneesh Bansal 
35*f698e9f3SAneesh Bansal 	*num_entries = i;
36*f698e9f3SAneesh Bansal }
37*f698e9f3SAneesh Bansal 
38*f698e9f3SAneesh Bansal int sec_config_pamu_table(uint32_t liodn_ns, uint32_t liodn_s)
39*f698e9f3SAneesh Bansal {
40*f698e9f3SAneesh Bansal 	struct pamu_addr_tbl tbl;
41*f698e9f3SAneesh Bansal 	int num_entries = 0;
42*f698e9f3SAneesh Bansal 	int ret = 0;
43*f698e9f3SAneesh Bansal 
44*f698e9f3SAneesh Bansal 	construct_pamu_addr_table(&tbl, &num_entries);
45*f698e9f3SAneesh Bansal 
46*f698e9f3SAneesh Bansal 	ret = config_pamu(&tbl, num_entries, liodn_ns);
47*f698e9f3SAneesh Bansal 	if (ret)
48*f698e9f3SAneesh Bansal 		return ret;
49*f698e9f3SAneesh Bansal 
50*f698e9f3SAneesh Bansal 	ret = config_pamu(&tbl, num_entries, liodn_s);
51*f698e9f3SAneesh Bansal 	if (ret)
52*f698e9f3SAneesh Bansal 		return ret;
53*f698e9f3SAneesh Bansal 
54*f698e9f3SAneesh Bansal 	return ret;
55*f698e9f3SAneesh Bansal }
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