1 /* 2 * Copyright 2010 Freescale Semiconductor, Inc. 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * Version 2 as published by the Free Software Foundation. 7 */ 8 9 #include <common.h> 10 #include <asm/fsl_lbc.h> 11 12 #ifdef CONFIG_MPC85xx 13 /* Boards should provide their own version of this if they use lbc sdram */ 14 void __sdram_init(void) 15 { 16 /* Do nothing */ 17 } 18 void sdram_init(void) __attribute__((weak, alias("__sdram_init"))); 19 #endif 20 21 22 void print_lbc_regs(void) 23 { 24 int i; 25 26 printf("\nLocal Bus Controller Registers\n"); 27 for (i = 0; i < 8; i++) { 28 printf("BR%d\t0x%08X\tOR%d\t0x%08X\n", 29 i, get_lbc_br(i), i, get_lbc_or(i)); 30 } 31 } 32 33 void init_early_memctl_regs(void) 34 { 35 uint init_br1 = 1; 36 37 #ifdef CONFIG_MPC85xx 38 /* if cs1 is already set via debugger, leave cs0/cs1 alone */ 39 if (get_lbc_br(1) & BR_V) 40 init_br1 = 0; 41 #endif 42 43 /* 44 * Map banks 0 (and maybe 1) to the FLASH banks 0 (and 1) at 45 * preliminary addresses - these have to be modified later 46 * when FLASH size has been determined 47 */ 48 #if defined(CONFIG_SYS_OR0_REMAP) 49 set_lbc_or(0, CONFIG_SYS_OR0_REMAP); 50 #endif 51 #if defined(CONFIG_SYS_OR1_REMAP) 52 set_lbc_or(1, CONFIG_SYS_OR1_REMAP); 53 #endif 54 /* now restrict to preliminary range */ 55 if (init_br1) { 56 set_lbc_br(0, CONFIG_SYS_BR0_PRELIM); 57 set_lbc_or(0, CONFIG_SYS_OR0_PRELIM); 58 59 #if defined(CONFIG_SYS_BR1_PRELIM) && defined(CONFIG_SYS_OR1_PRELIM) 60 set_lbc_or(1, CONFIG_SYS_OR1_PRELIM); 61 set_lbc_br(1, CONFIG_SYS_BR1_PRELIM); 62 #endif 63 } 64 65 #if defined(CONFIG_SYS_BR2_PRELIM) && defined(CONFIG_SYS_OR2_PRELIM) 66 set_lbc_or(2, CONFIG_SYS_OR2_PRELIM); 67 set_lbc_br(2, CONFIG_SYS_BR2_PRELIM); 68 #endif 69 70 #if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM) 71 set_lbc_or(3, CONFIG_SYS_OR3_PRELIM); 72 set_lbc_br(3, CONFIG_SYS_BR3_PRELIM); 73 #endif 74 75 #if defined(CONFIG_SYS_BR4_PRELIM) && defined(CONFIG_SYS_OR4_PRELIM) 76 set_lbc_or(4, CONFIG_SYS_OR4_PRELIM); 77 set_lbc_br(4, CONFIG_SYS_BR4_PRELIM); 78 #endif 79 80 #if defined(CONFIG_SYS_BR5_PRELIM) && defined(CONFIG_SYS_OR5_PRELIM) 81 set_lbc_or(5, CONFIG_SYS_OR5_PRELIM); 82 set_lbc_br(5, CONFIG_SYS_BR5_PRELIM); 83 #endif 84 85 #if defined(CONFIG_SYS_BR6_PRELIM) && defined(CONFIG_SYS_OR6_PRELIM) 86 set_lbc_or(6, CONFIG_SYS_OR6_PRELIM); 87 set_lbc_br(6, CONFIG_SYS_BR6_PRELIM); 88 #endif 89 90 #if defined(CONFIG_SYS_BR7_PRELIM) && defined(CONFIG_SYS_OR7_PRELIM) 91 set_lbc_or(7, CONFIG_SYS_OR7_PRELIM); 92 set_lbc_br(7, CONFIG_SYS_BR7_PRELIM); 93 #endif 94 } 95 96 /* 97 * Configures a UPM. The function requires the respective MxMR to be set 98 * before calling this function. "size" is the number or entries, not a sizeof. 99 */ 100 void upmconfig(uint upm, uint *table, uint size) 101 { 102 fsl_lbc_t *lbc = LBC_BASE_ADDR; 103 int i, mdr, mad, old_mad = 0; 104 u32 mask = (~MxMR_OP_MSK & ~MxMR_MAD_MSK); 105 u32 msel = BR_UPMx_TO_MSEL(upm); 106 u32 *mxmr = &lbc->mamr + upm; 107 volatile u8 *dummy = NULL; 108 109 if (upm < UPMA || upm > UPMC) { 110 printf("Error: %s() Bad UPM index %d\n", __func__, upm); 111 hang(); 112 } 113 114 /* 115 * Find the address for the dummy write - scan all of the BRs until we 116 * find one matching the UPM and extract the base address bits from it. 117 */ 118 for (i = 0; i < 8; i++) { 119 if ((get_lbc_br(i) & (BR_V | BR_MSEL)) == (BR_V | msel)) { 120 dummy = (volatile u8 *)(get_lbc_br(i) & BR_BA); 121 break; 122 } 123 } 124 125 if (!dummy) { 126 printf("Error: %s() No matching BR\n", __func__); 127 hang(); 128 } 129 130 /* Program UPM using steps outlined by the reference manual */ 131 for (i = 0; i < size; i++) { 132 out_be32(mxmr, (in_be32(mxmr) & mask) | MxMR_OP_WARR | i); 133 out_be32(&lbc->mdr, table[i]); 134 mdr = in_be32(&lbc->mdr); 135 *dummy = 0; 136 do { 137 mad = in_be32(mxmr) & MxMR_MAD_MSK; 138 } while (mad <= old_mad && !(!mad && i == (size-1))); 139 old_mad = mad; 140 } 141 142 /* Return to normal operation */ 143 out_be32(mxmr, (in_be32(mxmr) & mask) | MxMR_OP_NORM); 144 } 145