1menu "mpc85xx CPU" 2 depends on MPC85xx 3 4config SYS_CPU 5 default "mpc85xx" 6 7config CMD_ERRATA 8 bool "Enable the 'errata' command" 9 depends on MPC85xx 10 default y 11 help 12 This enables the 'errata' command which displays a list of errata 13 work-arounds which are enabled for the current board. 14 15choice 16 prompt "Target select" 17 optional 18 19config TARGET_SBC8548 20 bool "Support sbc8548" 21 select ARCH_MPC8548 22 23config TARGET_SOCRATES 24 bool "Support socrates" 25 select ARCH_MPC8544 26 27config TARGET_B4420QDS 28 bool "Support B4420QDS" 29 select ARCH_B4420 30 select SUPPORT_SPL 31 select PHYS_64BIT 32 33config TARGET_B4860QDS 34 bool "Support B4860QDS" 35 select ARCH_B4860 36 select BOARD_LATE_INIT if CHAIN_OF_TRUST 37 select SUPPORT_SPL 38 select PHYS_64BIT 39 40config TARGET_BSC9131RDB 41 bool "Support BSC9131RDB" 42 select ARCH_BSC9131 43 select SUPPORT_SPL 44 select BOARD_EARLY_INIT_F 45 46config TARGET_BSC9132QDS 47 bool "Support BSC9132QDS" 48 select ARCH_BSC9132 49 select BOARD_LATE_INIT if CHAIN_OF_TRUST 50 select SUPPORT_SPL 51 select BOARD_EARLY_INIT_F 52 53config TARGET_C29XPCIE 54 bool "Support C29XPCIE" 55 select ARCH_C29X 56 select BOARD_LATE_INIT if CHAIN_OF_TRUST 57 select SUPPORT_SPL 58 select SUPPORT_TPL 59 select PHYS_64BIT 60 61config TARGET_P3041DS 62 bool "Support P3041DS" 63 select PHYS_64BIT 64 select ARCH_P3041 65 select BOARD_LATE_INIT if CHAIN_OF_TRUST 66 imply CMD_SATA 67 68config TARGET_P4080DS 69 bool "Support P4080DS" 70 select PHYS_64BIT 71 select ARCH_P4080 72 select BOARD_LATE_INIT if CHAIN_OF_TRUST 73 imply CMD_SATA 74 75config TARGET_P5020DS 76 bool "Support P5020DS" 77 select PHYS_64BIT 78 select ARCH_P5020 79 select BOARD_LATE_INIT if CHAIN_OF_TRUST 80 imply CMD_SATA 81 82config TARGET_P5040DS 83 bool "Support P5040DS" 84 select PHYS_64BIT 85 select ARCH_P5040 86 select BOARD_LATE_INIT if CHAIN_OF_TRUST 87 imply CMD_SATA 88 89config TARGET_MPC8536DS 90 bool "Support MPC8536DS" 91 select ARCH_MPC8536 92# Use DDR3 controller with DDR2 DIMMs on this board 93 select SYS_FSL_DDRC_GEN3 94 imply CMD_SATA 95 96config TARGET_MPC8541CDS 97 bool "Support MPC8541CDS" 98 select ARCH_MPC8541 99 100config TARGET_MPC8544DS 101 bool "Support MPC8544DS" 102 select ARCH_MPC8544 103 104config TARGET_MPC8548CDS 105 bool "Support MPC8548CDS" 106 select ARCH_MPC8548 107 108config TARGET_MPC8555CDS 109 bool "Support MPC8555CDS" 110 select ARCH_MPC8555 111 112config TARGET_MPC8568MDS 113 bool "Support MPC8568MDS" 114 select ARCH_MPC8568 115 116config TARGET_MPC8569MDS 117 bool "Support MPC8569MDS" 118 select ARCH_MPC8569 119 120config TARGET_MPC8572DS 121 bool "Support MPC8572DS" 122 select ARCH_MPC8572 123# Use DDR3 controller with DDR2 DIMMs on this board 124 select SYS_FSL_DDRC_GEN3 125 imply SCSI 126 127config TARGET_P1010RDB_PA 128 bool "Support P1010RDB_PA" 129 select ARCH_P1010 130 select BOARD_LATE_INIT if CHAIN_OF_TRUST 131 select SUPPORT_SPL 132 select SUPPORT_TPL 133 imply CMD_EEPROM 134 imply CMD_SATA 135 136config TARGET_P1010RDB_PB 137 bool "Support P1010RDB_PB" 138 select ARCH_P1010 139 select BOARD_LATE_INIT if CHAIN_OF_TRUST 140 select SUPPORT_SPL 141 select SUPPORT_TPL 142 imply CMD_EEPROM 143 imply CMD_SATA 144 145config TARGET_P1022DS 146 bool "Support P1022DS" 147 select ARCH_P1022 148 select SUPPORT_SPL 149 select SUPPORT_TPL 150 imply CMD_SATA 151 152config TARGET_P1023RDB 153 bool "Support P1023RDB" 154 select ARCH_P1023 155 imply CMD_EEPROM 156 157config TARGET_P1020MBG 158 bool "Support P1020MBG-PC" 159 select SUPPORT_SPL 160 select SUPPORT_TPL 161 select ARCH_P1020 162 imply CMD_EEPROM 163 imply CMD_SATA 164 165config TARGET_P1020RDB_PC 166 bool "Support P1020RDB-PC" 167 select SUPPORT_SPL 168 select SUPPORT_TPL 169 select ARCH_P1020 170 imply CMD_EEPROM 171 imply CMD_SATA 172 173config TARGET_P1020RDB_PD 174 bool "Support P1020RDB-PD" 175 select SUPPORT_SPL 176 select SUPPORT_TPL 177 select ARCH_P1020 178 imply CMD_EEPROM 179 imply CMD_SATA 180 181config TARGET_P1020UTM 182 bool "Support P1020UTM" 183 select SUPPORT_SPL 184 select SUPPORT_TPL 185 select ARCH_P1020 186 imply CMD_EEPROM 187 imply CMD_SATA 188 189config TARGET_P1021RDB 190 bool "Support P1021RDB" 191 select SUPPORT_SPL 192 select SUPPORT_TPL 193 select ARCH_P1021 194 imply CMD_EEPROM 195 imply CMD_SATA 196 197config TARGET_P1024RDB 198 bool "Support P1024RDB" 199 select SUPPORT_SPL 200 select SUPPORT_TPL 201 select ARCH_P1024 202 imply CMD_EEPROM 203 imply CMD_SATA 204 205config TARGET_P1025RDB 206 bool "Support P1025RDB" 207 select SUPPORT_SPL 208 select SUPPORT_TPL 209 select ARCH_P1025 210 imply CMD_EEPROM 211 imply CMD_SATA 212 imply SATA_SIL 213 214config TARGET_P2020RDB 215 bool "Support P2020RDB-PC" 216 select SUPPORT_SPL 217 select SUPPORT_TPL 218 select ARCH_P2020 219 imply CMD_EEPROM 220 imply CMD_SATA 221 imply SATA_SIL 222 223config TARGET_P1_TWR 224 bool "Support p1_twr" 225 select ARCH_P1025 226 227config TARGET_P2041RDB 228 bool "Support P2041RDB" 229 select ARCH_P2041 230 select BOARD_LATE_INIT if CHAIN_OF_TRUST 231 select PHYS_64BIT 232 imply CMD_SATA 233 234config TARGET_QEMU_PPCE500 235 bool "Support qemu-ppce500" 236 select ARCH_QEMU_E500 237 select PHYS_64BIT 238 239config TARGET_T1024QDS 240 bool "Support T1024QDS" 241 select ARCH_T1024 242 select BOARD_LATE_INIT if CHAIN_OF_TRUST 243 select SUPPORT_SPL 244 select PHYS_64BIT 245 imply CMD_EEPROM 246 imply CMD_SATA 247 248config TARGET_T1023RDB 249 bool "Support T1023RDB" 250 select ARCH_T1023 251 select BOARD_LATE_INIT if CHAIN_OF_TRUST 252 select SUPPORT_SPL 253 select PHYS_64BIT 254 imply CMD_EEPROM 255 256config TARGET_T1024RDB 257 bool "Support T1024RDB" 258 select ARCH_T1024 259 select BOARD_LATE_INIT if CHAIN_OF_TRUST 260 select SUPPORT_SPL 261 select PHYS_64BIT 262 imply CMD_EEPROM 263 264config TARGET_T1040QDS 265 bool "Support T1040QDS" 266 select ARCH_T1040 267 select BOARD_LATE_INIT if CHAIN_OF_TRUST 268 select PHYS_64BIT 269 imply CMD_EEPROM 270 imply CMD_SATA 271 272config TARGET_T1040RDB 273 bool "Support T1040RDB" 274 select ARCH_T1040 275 select BOARD_LATE_INIT if CHAIN_OF_TRUST 276 select SUPPORT_SPL 277 select PHYS_64BIT 278 imply CMD_SATA 279 280config TARGET_T1040D4RDB 281 bool "Support T1040D4RDB" 282 select ARCH_T1040 283 select BOARD_LATE_INIT if CHAIN_OF_TRUST 284 select SUPPORT_SPL 285 select PHYS_64BIT 286 imply CMD_SATA 287 288config TARGET_T1042RDB 289 bool "Support T1042RDB" 290 select ARCH_T1042 291 select BOARD_LATE_INIT if CHAIN_OF_TRUST 292 select SUPPORT_SPL 293 select PHYS_64BIT 294 imply CMD_SATA 295 296config TARGET_T1042D4RDB 297 bool "Support T1042D4RDB" 298 select ARCH_T1042 299 select BOARD_LATE_INIT if CHAIN_OF_TRUST 300 select SUPPORT_SPL 301 select PHYS_64BIT 302 imply CMD_SATA 303 304config TARGET_T1042RDB_PI 305 bool "Support T1042RDB_PI" 306 select ARCH_T1042 307 select BOARD_LATE_INIT if CHAIN_OF_TRUST 308 select SUPPORT_SPL 309 select PHYS_64BIT 310 imply CMD_SATA 311 312config TARGET_T2080QDS 313 bool "Support T2080QDS" 314 select ARCH_T2080 315 select BOARD_LATE_INIT if CHAIN_OF_TRUST 316 select SUPPORT_SPL 317 select PHYS_64BIT 318 imply CMD_SATA 319 320config TARGET_T2080RDB 321 bool "Support T2080RDB" 322 select ARCH_T2080 323 select BOARD_LATE_INIT if CHAIN_OF_TRUST 324 select SUPPORT_SPL 325 select PHYS_64BIT 326 imply CMD_SATA 327 328config TARGET_T2081QDS 329 bool "Support T2081QDS" 330 select ARCH_T2081 331 select SUPPORT_SPL 332 select PHYS_64BIT 333 334config TARGET_T4160QDS 335 bool "Support T4160QDS" 336 select ARCH_T4160 337 select BOARD_LATE_INIT if CHAIN_OF_TRUST 338 select SUPPORT_SPL 339 select PHYS_64BIT 340 imply CMD_SATA 341 342config TARGET_T4160RDB 343 bool "Support T4160RDB" 344 select ARCH_T4160 345 select SUPPORT_SPL 346 select PHYS_64BIT 347 348config TARGET_T4240QDS 349 bool "Support T4240QDS" 350 select ARCH_T4240 351 select BOARD_LATE_INIT if CHAIN_OF_TRUST 352 select SUPPORT_SPL 353 select PHYS_64BIT 354 imply CMD_SATA 355 356config TARGET_T4240RDB 357 bool "Support T4240RDB" 358 select ARCH_T4240 359 select SUPPORT_SPL 360 select PHYS_64BIT 361 imply CMD_SATA 362 363config TARGET_CONTROLCENTERD 364 bool "Support controlcenterd" 365 select ARCH_P1022 366 367config TARGET_KMP204X 368 bool "Support kmp204x" 369 select ARCH_P2041 370 select PHYS_64BIT 371 imply CMD_CRAMFS 372 imply FS_CRAMFS 373 374config TARGET_XPEDITE520X 375 bool "Support xpedite520x" 376 select ARCH_MPC8548 377 378config TARGET_XPEDITE537X 379 bool "Support xpedite537x" 380 select ARCH_MPC8572 381# Use DDR3 controller with DDR2 DIMMs on this board 382 select SYS_FSL_DDRC_GEN3 383 384config TARGET_XPEDITE550X 385 bool "Support xpedite550x" 386 select ARCH_P2020 387 388config TARGET_UCP1020 389 bool "Support uCP1020" 390 select ARCH_P1020 391 imply CMD_SATA 392 393config TARGET_CYRUS_P5020 394 bool "Support Varisys Cyrus P5020" 395 select ARCH_P5020 396 select PHYS_64BIT 397 398config TARGET_CYRUS_P5040 399 bool "Support Varisys Cyrus P5040" 400 select ARCH_P5040 401 select PHYS_64BIT 402 403endchoice 404 405config ARCH_B4420 406 bool 407 select E500MC 408 select E6500 409 select FSL_LAW 410 select SYS_FSL_DDR_VER_47 411 select SYS_FSL_ERRATUM_A004477 412 select SYS_FSL_ERRATUM_A005871 413 select SYS_FSL_ERRATUM_A006379 414 select SYS_FSL_ERRATUM_A006384 415 select SYS_FSL_ERRATUM_A006475 416 select SYS_FSL_ERRATUM_A006593 417 select SYS_FSL_ERRATUM_A007075 418 select SYS_FSL_ERRATUM_A007186 419 select SYS_FSL_ERRATUM_A007212 420 select SYS_FSL_ERRATUM_A009942 421 select SYS_FSL_HAS_DDR3 422 select SYS_FSL_HAS_SEC 423 select SYS_FSL_QORIQ_CHASSIS2 424 select SYS_FSL_SEC_BE 425 select SYS_FSL_SEC_COMPAT_4 426 select SYS_PPC64 427 select FSL_IFC 428 imply CMD_EEPROM 429 imply CMD_NAND 430 imply CMD_REGINFO 431 432config ARCH_B4860 433 bool 434 select E500MC 435 select E6500 436 select FSL_LAW 437 select SYS_FSL_DDR_VER_47 438 select SYS_FSL_ERRATUM_A004477 439 select SYS_FSL_ERRATUM_A005871 440 select SYS_FSL_ERRATUM_A006379 441 select SYS_FSL_ERRATUM_A006384 442 select SYS_FSL_ERRATUM_A006475 443 select SYS_FSL_ERRATUM_A006593 444 select SYS_FSL_ERRATUM_A007075 445 select SYS_FSL_ERRATUM_A007186 446 select SYS_FSL_ERRATUM_A007212 447 select SYS_FSL_ERRATUM_A007907 448 select SYS_FSL_ERRATUM_A009942 449 select SYS_FSL_HAS_DDR3 450 select SYS_FSL_HAS_SEC 451 select SYS_FSL_QORIQ_CHASSIS2 452 select SYS_FSL_SEC_BE 453 select SYS_FSL_SEC_COMPAT_4 454 select SYS_PPC64 455 select FSL_IFC 456 imply CMD_EEPROM 457 imply CMD_NAND 458 imply CMD_REGINFO 459 460config ARCH_BSC9131 461 bool 462 select FSL_LAW 463 select SYS_FSL_DDR_VER_44 464 select SYS_FSL_ERRATUM_A004477 465 select SYS_FSL_ERRATUM_A005125 466 select SYS_FSL_ERRATUM_ESDHC111 467 select SYS_FSL_HAS_DDR3 468 select SYS_FSL_HAS_SEC 469 select SYS_FSL_SEC_BE 470 select SYS_FSL_SEC_COMPAT_4 471 select FSL_IFC 472 imply CMD_EEPROM 473 imply CMD_NAND 474 imply CMD_REGINFO 475 476config ARCH_BSC9132 477 bool 478 select FSL_LAW 479 select SYS_FSL_DDR_VER_46 480 select SYS_FSL_ERRATUM_A004477 481 select SYS_FSL_ERRATUM_A005125 482 select SYS_FSL_ERRATUM_A005434 483 select SYS_FSL_ERRATUM_ESDHC111 484 select SYS_FSL_ERRATUM_I2C_A004447 485 select SYS_FSL_ERRATUM_IFC_A002769 486 select SYS_FSL_HAS_DDR3 487 select SYS_FSL_HAS_SEC 488 select SYS_FSL_SEC_BE 489 select SYS_FSL_SEC_COMPAT_4 490 select SYS_PPC_E500_USE_DEBUG_TLB 491 select FSL_IFC 492 imply CMD_EEPROM 493 imply CMD_MTDPARTS 494 imply CMD_NAND 495 imply CMD_PCI 496 imply CMD_REGINFO 497 498config ARCH_C29X 499 bool 500 select FSL_LAW 501 select SYS_FSL_DDR_VER_46 502 select SYS_FSL_ERRATUM_A005125 503 select SYS_FSL_ERRATUM_ESDHC111 504 select SYS_FSL_HAS_DDR3 505 select SYS_FSL_HAS_SEC 506 select SYS_FSL_SEC_BE 507 select SYS_FSL_SEC_COMPAT_6 508 select SYS_PPC_E500_USE_DEBUG_TLB 509 select FSL_IFC 510 imply CMD_NAND 511 imply CMD_PCI 512 imply CMD_REGINFO 513 514config ARCH_MPC8536 515 bool 516 select FSL_LAW 517 select SYS_FSL_ERRATUM_A004508 518 select SYS_FSL_ERRATUM_A005125 519 select SYS_FSL_HAS_DDR2 520 select SYS_FSL_HAS_DDR3 521 select SYS_FSL_HAS_SEC 522 select SYS_FSL_SEC_BE 523 select SYS_FSL_SEC_COMPAT_2 524 select SYS_PPC_E500_USE_DEBUG_TLB 525 select FSL_ELBC 526 imply CMD_NAND 527 imply CMD_SATA 528 imply CMD_REGINFO 529 530config ARCH_MPC8540 531 bool 532 select FSL_LAW 533 select SYS_FSL_HAS_DDR1 534 535config ARCH_MPC8541 536 bool 537 select FSL_LAW 538 select SYS_FSL_HAS_DDR1 539 select SYS_FSL_HAS_SEC 540 select SYS_FSL_SEC_BE 541 select SYS_FSL_SEC_COMPAT_2 542 543config ARCH_MPC8544 544 bool 545 select FSL_LAW 546 select SYS_FSL_ERRATUM_A005125 547 select SYS_FSL_HAS_DDR2 548 select SYS_FSL_HAS_SEC 549 select SYS_FSL_SEC_BE 550 select SYS_FSL_SEC_COMPAT_2 551 select SYS_PPC_E500_USE_DEBUG_TLB 552 select FSL_ELBC 553 554config ARCH_MPC8548 555 bool 556 select FSL_LAW 557 select SYS_FSL_ERRATUM_A005125 558 select SYS_FSL_ERRATUM_NMG_DDR120 559 select SYS_FSL_ERRATUM_NMG_LBC103 560 select SYS_FSL_ERRATUM_NMG_ETSEC129 561 select SYS_FSL_ERRATUM_I2C_A004447 562 select SYS_FSL_HAS_DDR2 563 select SYS_FSL_HAS_DDR1 564 select SYS_FSL_HAS_SEC 565 select SYS_FSL_SEC_BE 566 select SYS_FSL_SEC_COMPAT_2 567 select SYS_PPC_E500_USE_DEBUG_TLB 568 imply CMD_REGINFO 569 570config ARCH_MPC8555 571 bool 572 select FSL_LAW 573 select SYS_FSL_HAS_DDR1 574 select SYS_FSL_HAS_SEC 575 select SYS_FSL_SEC_BE 576 select SYS_FSL_SEC_COMPAT_2 577 578config ARCH_MPC8560 579 bool 580 select FSL_LAW 581 select SYS_FSL_HAS_DDR1 582 583config ARCH_MPC8568 584 bool 585 select FSL_LAW 586 select SYS_FSL_HAS_DDR2 587 select SYS_FSL_HAS_SEC 588 select SYS_FSL_SEC_BE 589 select SYS_FSL_SEC_COMPAT_2 590 591config ARCH_MPC8569 592 bool 593 select FSL_LAW 594 select SYS_FSL_ERRATUM_A004508 595 select SYS_FSL_ERRATUM_A005125 596 select SYS_FSL_HAS_DDR3 597 select SYS_FSL_HAS_SEC 598 select SYS_FSL_SEC_BE 599 select SYS_FSL_SEC_COMPAT_2 600 select FSL_ELBC 601 imply CMD_NAND 602 603config ARCH_MPC8572 604 bool 605 select FSL_LAW 606 select SYS_FSL_ERRATUM_A004508 607 select SYS_FSL_ERRATUM_A005125 608 select SYS_FSL_ERRATUM_DDR_115 609 select SYS_FSL_ERRATUM_DDR111_DDR134 610 select SYS_FSL_HAS_DDR2 611 select SYS_FSL_HAS_DDR3 612 select SYS_FSL_HAS_SEC 613 select SYS_FSL_SEC_BE 614 select SYS_FSL_SEC_COMPAT_2 615 select SYS_PPC_E500_USE_DEBUG_TLB 616 select FSL_ELBC 617 imply CMD_NAND 618 619config ARCH_P1010 620 bool 621 select FSL_LAW 622 select SYS_FSL_ERRATUM_A004477 623 select SYS_FSL_ERRATUM_A004508 624 select SYS_FSL_ERRATUM_A005125 625 select SYS_FSL_ERRATUM_A006261 626 select SYS_FSL_ERRATUM_A007075 627 select SYS_FSL_ERRATUM_ESDHC111 628 select SYS_FSL_ERRATUM_I2C_A004447 629 select SYS_FSL_ERRATUM_IFC_A002769 630 select SYS_FSL_ERRATUM_P1010_A003549 631 select SYS_FSL_ERRATUM_SEC_A003571 632 select SYS_FSL_ERRATUM_IFC_A003399 633 select SYS_FSL_HAS_DDR3 634 select SYS_FSL_HAS_SEC 635 select SYS_FSL_SEC_BE 636 select SYS_FSL_SEC_COMPAT_4 637 select SYS_PPC_E500_USE_DEBUG_TLB 638 select FSL_IFC 639 imply CMD_EEPROM 640 imply CMD_MTDPARTS 641 imply CMD_NAND 642 imply CMD_SATA 643 imply CMD_PCI 644 imply CMD_REGINFO 645 646config ARCH_P1011 647 bool 648 select FSL_LAW 649 select SYS_FSL_ERRATUM_A004508 650 select SYS_FSL_ERRATUM_A005125 651 select SYS_FSL_ERRATUM_ELBC_A001 652 select SYS_FSL_ERRATUM_ESDHC111 653 select SYS_FSL_HAS_DDR3 654 select SYS_FSL_HAS_SEC 655 select SYS_FSL_SEC_BE 656 select SYS_FSL_SEC_COMPAT_2 657 select SYS_PPC_E500_USE_DEBUG_TLB 658 select FSL_ELBC 659 660config ARCH_P1020 661 bool 662 select FSL_LAW 663 select SYS_FSL_ERRATUM_A004508 664 select SYS_FSL_ERRATUM_A005125 665 select SYS_FSL_ERRATUM_ELBC_A001 666 select SYS_FSL_ERRATUM_ESDHC111 667 select SYS_FSL_HAS_DDR3 668 select SYS_FSL_HAS_SEC 669 select SYS_FSL_SEC_BE 670 select SYS_FSL_SEC_COMPAT_2 671 select SYS_PPC_E500_USE_DEBUG_TLB 672 select FSL_ELBC 673 imply CMD_NAND 674 imply CMD_SATA 675 imply CMD_PCI 676 imply CMD_REGINFO 677 imply SATA_SIL 678 679config ARCH_P1021 680 bool 681 select FSL_LAW 682 select SYS_FSL_ERRATUM_A004508 683 select SYS_FSL_ERRATUM_A005125 684 select SYS_FSL_ERRATUM_ELBC_A001 685 select SYS_FSL_ERRATUM_ESDHC111 686 select SYS_FSL_HAS_DDR3 687 select SYS_FSL_HAS_SEC 688 select SYS_FSL_SEC_BE 689 select SYS_FSL_SEC_COMPAT_2 690 select SYS_PPC_E500_USE_DEBUG_TLB 691 select FSL_ELBC 692 imply CMD_REGINFO 693 imply CMD_NAND 694 imply CMD_SATA 695 imply CMD_REGINFO 696 imply SATA_SIL 697 698config ARCH_P1022 699 bool 700 select FSL_LAW 701 select SYS_FSL_ERRATUM_A004477 702 select SYS_FSL_ERRATUM_A004508 703 select SYS_FSL_ERRATUM_A005125 704 select SYS_FSL_ERRATUM_ELBC_A001 705 select SYS_FSL_ERRATUM_ESDHC111 706 select SYS_FSL_ERRATUM_SATA_A001 707 select SYS_FSL_HAS_DDR3 708 select SYS_FSL_HAS_SEC 709 select SYS_FSL_SEC_BE 710 select SYS_FSL_SEC_COMPAT_2 711 select SYS_PPC_E500_USE_DEBUG_TLB 712 select FSL_ELBC 713 714config ARCH_P1023 715 bool 716 select FSL_LAW 717 select SYS_FSL_ERRATUM_A004508 718 select SYS_FSL_ERRATUM_A005125 719 select SYS_FSL_ERRATUM_I2C_A004447 720 select SYS_FSL_HAS_DDR3 721 select SYS_FSL_HAS_SEC 722 select SYS_FSL_SEC_BE 723 select SYS_FSL_SEC_COMPAT_4 724 select FSL_ELBC 725 726config ARCH_P1024 727 bool 728 select FSL_LAW 729 select SYS_FSL_ERRATUM_A004508 730 select SYS_FSL_ERRATUM_A005125 731 select SYS_FSL_ERRATUM_ELBC_A001 732 select SYS_FSL_ERRATUM_ESDHC111 733 select SYS_FSL_HAS_DDR3 734 select SYS_FSL_HAS_SEC 735 select SYS_FSL_SEC_BE 736 select SYS_FSL_SEC_COMPAT_2 737 select SYS_PPC_E500_USE_DEBUG_TLB 738 select FSL_ELBC 739 imply CMD_EEPROM 740 imply CMD_NAND 741 imply CMD_SATA 742 imply CMD_PCI 743 imply CMD_REGINFO 744 imply SATA_SIL 745 746config ARCH_P1025 747 bool 748 select FSL_LAW 749 select SYS_FSL_ERRATUM_A004508 750 select SYS_FSL_ERRATUM_A005125 751 select SYS_FSL_ERRATUM_ELBC_A001 752 select SYS_FSL_ERRATUM_ESDHC111 753 select SYS_FSL_HAS_DDR3 754 select SYS_FSL_HAS_SEC 755 select SYS_FSL_SEC_BE 756 select SYS_FSL_SEC_COMPAT_2 757 select SYS_PPC_E500_USE_DEBUG_TLB 758 select FSL_ELBC 759 imply CMD_SATA 760 imply CMD_REGINFO 761 762config ARCH_P2020 763 bool 764 select FSL_LAW 765 select SYS_FSL_ERRATUM_A004477 766 select SYS_FSL_ERRATUM_A004508 767 select SYS_FSL_ERRATUM_A005125 768 select SYS_FSL_ERRATUM_ESDHC111 769 select SYS_FSL_ERRATUM_ESDHC_A001 770 select SYS_FSL_HAS_DDR3 771 select SYS_FSL_HAS_SEC 772 select SYS_FSL_SEC_BE 773 select SYS_FSL_SEC_COMPAT_2 774 select SYS_PPC_E500_USE_DEBUG_TLB 775 select FSL_ELBC 776 imply CMD_EEPROM 777 imply CMD_NAND 778 imply CMD_REGINFO 779 780config ARCH_P2041 781 bool 782 select E500MC 783 select FSL_LAW 784 select SYS_FSL_ERRATUM_A004510 785 select SYS_FSL_ERRATUM_A004849 786 select SYS_FSL_ERRATUM_A006261 787 select SYS_FSL_ERRATUM_CPU_A003999 788 select SYS_FSL_ERRATUM_DDR_A003 789 select SYS_FSL_ERRATUM_DDR_A003474 790 select SYS_FSL_ERRATUM_ESDHC111 791 select SYS_FSL_ERRATUM_I2C_A004447 792 select SYS_FSL_ERRATUM_NMG_CPU_A011 793 select SYS_FSL_ERRATUM_SRIO_A004034 794 select SYS_FSL_ERRATUM_USB14 795 select SYS_FSL_HAS_DDR3 796 select SYS_FSL_HAS_SEC 797 select SYS_FSL_QORIQ_CHASSIS1 798 select SYS_FSL_SEC_BE 799 select SYS_FSL_SEC_COMPAT_4 800 select FSL_ELBC 801 imply CMD_NAND 802 803config ARCH_P3041 804 bool 805 select E500MC 806 select FSL_LAW 807 select SYS_FSL_DDR_VER_44 808 select SYS_FSL_ERRATUM_A004510 809 select SYS_FSL_ERRATUM_A004849 810 select SYS_FSL_ERRATUM_A005812 811 select SYS_FSL_ERRATUM_A006261 812 select SYS_FSL_ERRATUM_CPU_A003999 813 select SYS_FSL_ERRATUM_DDR_A003 814 select SYS_FSL_ERRATUM_DDR_A003474 815 select SYS_FSL_ERRATUM_ESDHC111 816 select SYS_FSL_ERRATUM_I2C_A004447 817 select SYS_FSL_ERRATUM_NMG_CPU_A011 818 select SYS_FSL_ERRATUM_SRIO_A004034 819 select SYS_FSL_ERRATUM_USB14 820 select SYS_FSL_HAS_DDR3 821 select SYS_FSL_HAS_SEC 822 select SYS_FSL_QORIQ_CHASSIS1 823 select SYS_FSL_SEC_BE 824 select SYS_FSL_SEC_COMPAT_4 825 select FSL_ELBC 826 imply CMD_NAND 827 imply CMD_SATA 828 imply CMD_REGINFO 829 830config ARCH_P4080 831 bool 832 select E500MC 833 select FSL_LAW 834 select SYS_FSL_DDR_VER_44 835 select SYS_FSL_ERRATUM_A004510 836 select SYS_FSL_ERRATUM_A004580 837 select SYS_FSL_ERRATUM_A004849 838 select SYS_FSL_ERRATUM_A005812 839 select SYS_FSL_ERRATUM_A007075 840 select SYS_FSL_ERRATUM_CPC_A002 841 select SYS_FSL_ERRATUM_CPC_A003 842 select SYS_FSL_ERRATUM_CPU_A003999 843 select SYS_FSL_ERRATUM_DDR_A003 844 select SYS_FSL_ERRATUM_DDR_A003474 845 select SYS_FSL_ERRATUM_ELBC_A001 846 select SYS_FSL_ERRATUM_ESDHC111 847 select SYS_FSL_ERRATUM_ESDHC13 848 select SYS_FSL_ERRATUM_ESDHC135 849 select SYS_FSL_ERRATUM_I2C_A004447 850 select SYS_FSL_ERRATUM_NMG_CPU_A011 851 select SYS_FSL_ERRATUM_SRIO_A004034 852 select SYS_P4080_ERRATUM_CPU22 853 select SYS_P4080_ERRATUM_PCIE_A003 854 select SYS_P4080_ERRATUM_SERDES8 855 select SYS_P4080_ERRATUM_SERDES9 856 select SYS_P4080_ERRATUM_SERDES_A001 857 select SYS_P4080_ERRATUM_SERDES_A005 858 select SYS_FSL_HAS_DDR3 859 select SYS_FSL_HAS_SEC 860 select SYS_FSL_QORIQ_CHASSIS1 861 select SYS_FSL_SEC_BE 862 select SYS_FSL_SEC_COMPAT_4 863 select FSL_ELBC 864 imply CMD_SATA 865 imply CMD_REGINFO 866 imply SATA_SIL 867 868config ARCH_P5020 869 bool 870 select E500MC 871 select FSL_LAW 872 select SYS_FSL_DDR_VER_44 873 select SYS_FSL_ERRATUM_A004510 874 select SYS_FSL_ERRATUM_A006261 875 select SYS_FSL_ERRATUM_DDR_A003 876 select SYS_FSL_ERRATUM_DDR_A003474 877 select SYS_FSL_ERRATUM_ESDHC111 878 select SYS_FSL_ERRATUM_I2C_A004447 879 select SYS_FSL_ERRATUM_SRIO_A004034 880 select SYS_FSL_ERRATUM_USB14 881 select SYS_FSL_HAS_DDR3 882 select SYS_FSL_HAS_SEC 883 select SYS_FSL_QORIQ_CHASSIS1 884 select SYS_FSL_SEC_BE 885 select SYS_FSL_SEC_COMPAT_4 886 select SYS_PPC64 887 select FSL_ELBC 888 imply CMD_SATA 889 imply CMD_REGINFO 890 891config ARCH_P5040 892 bool 893 select E500MC 894 select FSL_LAW 895 select SYS_FSL_DDR_VER_44 896 select SYS_FSL_ERRATUM_A004510 897 select SYS_FSL_ERRATUM_A004699 898 select SYS_FSL_ERRATUM_A005812 899 select SYS_FSL_ERRATUM_A006261 900 select SYS_FSL_ERRATUM_DDR_A003 901 select SYS_FSL_ERRATUM_DDR_A003474 902 select SYS_FSL_ERRATUM_ESDHC111 903 select SYS_FSL_ERRATUM_USB14 904 select SYS_FSL_HAS_DDR3 905 select SYS_FSL_HAS_SEC 906 select SYS_FSL_QORIQ_CHASSIS1 907 select SYS_FSL_SEC_BE 908 select SYS_FSL_SEC_COMPAT_4 909 select SYS_PPC64 910 select FSL_ELBC 911 imply CMD_SATA 912 imply CMD_REGINFO 913 914config ARCH_QEMU_E500 915 bool 916 917config ARCH_T1023 918 bool 919 select E500MC 920 select FSL_LAW 921 select SYS_FSL_DDR_VER_50 922 select SYS_FSL_ERRATUM_A008378 923 select SYS_FSL_ERRATUM_A009663 924 select SYS_FSL_ERRATUM_A009942 925 select SYS_FSL_ERRATUM_ESDHC111 926 select SYS_FSL_HAS_DDR3 927 select SYS_FSL_HAS_DDR4 928 select SYS_FSL_HAS_SEC 929 select SYS_FSL_QORIQ_CHASSIS2 930 select SYS_FSL_SEC_BE 931 select SYS_FSL_SEC_COMPAT_5 932 select FSL_IFC 933 imply CMD_EEPROM 934 imply CMD_NAND 935 imply CMD_REGINFO 936 937config ARCH_T1024 938 bool 939 select E500MC 940 select FSL_LAW 941 select SYS_FSL_DDR_VER_50 942 select SYS_FSL_ERRATUM_A008378 943 select SYS_FSL_ERRATUM_A009663 944 select SYS_FSL_ERRATUM_A009942 945 select SYS_FSL_ERRATUM_ESDHC111 946 select SYS_FSL_HAS_DDR3 947 select SYS_FSL_HAS_DDR4 948 select SYS_FSL_HAS_SEC 949 select SYS_FSL_QORIQ_CHASSIS2 950 select SYS_FSL_SEC_BE 951 select SYS_FSL_SEC_COMPAT_5 952 select FSL_IFC 953 imply CMD_EEPROM 954 imply CMD_NAND 955 imply CMD_MTDPARTS 956 imply CMD_REGINFO 957 958config ARCH_T1040 959 bool 960 select E500MC 961 select FSL_LAW 962 select SYS_FSL_DDR_VER_50 963 select SYS_FSL_ERRATUM_A008044 964 select SYS_FSL_ERRATUM_A008378 965 select SYS_FSL_ERRATUM_A009663 966 select SYS_FSL_ERRATUM_A009942 967 select SYS_FSL_ERRATUM_ESDHC111 968 select SYS_FSL_HAS_DDR3 969 select SYS_FSL_HAS_DDR4 970 select SYS_FSL_HAS_SEC 971 select SYS_FSL_QORIQ_CHASSIS2 972 select SYS_FSL_SEC_BE 973 select SYS_FSL_SEC_COMPAT_5 974 select FSL_IFC 975 imply CMD_MTDPARTS 976 imply CMD_NAND 977 imply CMD_SATA 978 imply CMD_REGINFO 979 980config ARCH_T1042 981 bool 982 select E500MC 983 select FSL_LAW 984 select SYS_FSL_DDR_VER_50 985 select SYS_FSL_ERRATUM_A008044 986 select SYS_FSL_ERRATUM_A008378 987 select SYS_FSL_ERRATUM_A009663 988 select SYS_FSL_ERRATUM_A009942 989 select SYS_FSL_ERRATUM_ESDHC111 990 select SYS_FSL_HAS_DDR3 991 select SYS_FSL_HAS_DDR4 992 select SYS_FSL_HAS_SEC 993 select SYS_FSL_QORIQ_CHASSIS2 994 select SYS_FSL_SEC_BE 995 select SYS_FSL_SEC_COMPAT_5 996 select FSL_IFC 997 imply CMD_MTDPARTS 998 imply CMD_NAND 999 imply CMD_SATA 1000 imply CMD_REGINFO 1001 1002config ARCH_T2080 1003 bool 1004 select E500MC 1005 select E6500 1006 select FSL_LAW 1007 select SYS_FSL_DDR_VER_47 1008 select SYS_FSL_ERRATUM_A006379 1009 select SYS_FSL_ERRATUM_A006593 1010 select SYS_FSL_ERRATUM_A007186 1011 select SYS_FSL_ERRATUM_A007212 1012 select SYS_FSL_ERRATUM_A007815 1013 select SYS_FSL_ERRATUM_A007907 1014 select SYS_FSL_ERRATUM_A009942 1015 select SYS_FSL_ERRATUM_ESDHC111 1016 select SYS_FSL_HAS_DDR3 1017 select SYS_FSL_HAS_SEC 1018 select SYS_FSL_QORIQ_CHASSIS2 1019 select SYS_FSL_SEC_BE 1020 select SYS_FSL_SEC_COMPAT_4 1021 select SYS_PPC64 1022 select FSL_IFC 1023 imply CMD_SATA 1024 imply CMD_NAND 1025 imply CMD_REGINFO 1026 1027config ARCH_T2081 1028 bool 1029 select E500MC 1030 select E6500 1031 select FSL_LAW 1032 select SYS_FSL_DDR_VER_47 1033 select SYS_FSL_ERRATUM_A006379 1034 select SYS_FSL_ERRATUM_A006593 1035 select SYS_FSL_ERRATUM_A007186 1036 select SYS_FSL_ERRATUM_A007212 1037 select SYS_FSL_ERRATUM_A009942 1038 select SYS_FSL_ERRATUM_ESDHC111 1039 select SYS_FSL_HAS_DDR3 1040 select SYS_FSL_HAS_SEC 1041 select SYS_FSL_QORIQ_CHASSIS2 1042 select SYS_FSL_SEC_BE 1043 select SYS_FSL_SEC_COMPAT_4 1044 select SYS_PPC64 1045 select FSL_IFC 1046 imply CMD_NAND 1047 imply CMD_REGINFO 1048 1049config ARCH_T4160 1050 bool 1051 select E500MC 1052 select E6500 1053 select FSL_LAW 1054 select SYS_FSL_DDR_VER_47 1055 select SYS_FSL_ERRATUM_A004468 1056 select SYS_FSL_ERRATUM_A005871 1057 select SYS_FSL_ERRATUM_A006379 1058 select SYS_FSL_ERRATUM_A006593 1059 select SYS_FSL_ERRATUM_A007186 1060 select SYS_FSL_ERRATUM_A007798 1061 select SYS_FSL_ERRATUM_A009942 1062 select SYS_FSL_HAS_DDR3 1063 select SYS_FSL_HAS_SEC 1064 select SYS_FSL_QORIQ_CHASSIS2 1065 select SYS_FSL_SEC_BE 1066 select SYS_FSL_SEC_COMPAT_4 1067 select SYS_PPC64 1068 select FSL_IFC 1069 imply CMD_SATA 1070 imply CMD_NAND 1071 imply CMD_REGINFO 1072 1073config ARCH_T4240 1074 bool 1075 select E500MC 1076 select E6500 1077 select FSL_LAW 1078 select SYS_FSL_DDR_VER_47 1079 select SYS_FSL_ERRATUM_A004468 1080 select SYS_FSL_ERRATUM_A005871 1081 select SYS_FSL_ERRATUM_A006261 1082 select SYS_FSL_ERRATUM_A006379 1083 select SYS_FSL_ERRATUM_A006593 1084 select SYS_FSL_ERRATUM_A007186 1085 select SYS_FSL_ERRATUM_A007798 1086 select SYS_FSL_ERRATUM_A007815 1087 select SYS_FSL_ERRATUM_A007907 1088 select SYS_FSL_ERRATUM_A009942 1089 select SYS_FSL_HAS_DDR3 1090 select SYS_FSL_HAS_SEC 1091 select SYS_FSL_QORIQ_CHASSIS2 1092 select SYS_FSL_SEC_BE 1093 select SYS_FSL_SEC_COMPAT_4 1094 select SYS_PPC64 1095 select FSL_IFC 1096 imply CMD_SATA 1097 imply CMD_NAND 1098 imply CMD_REGINFO 1099 1100config BOOKE 1101 bool 1102 default y 1103 1104config E500 1105 bool 1106 default y 1107 help 1108 Enable PowerPC E500 cores, including e500v1, e500v2, e500mc 1109 1110config E500MC 1111 bool 1112 imply CMD_PCI 1113 help 1114 Enble PowerPC E500MC core 1115 1116config E6500 1117 bool 1118 help 1119 Enable PowerPC E6500 core 1120 1121config FSL_LAW 1122 bool 1123 help 1124 Use Freescale common code for Local Access Window 1125 1126config SECURE_BOOT 1127 bool "Secure Boot" 1128 help 1129 Enable Freescale Secure Boot feature. Normally selected 1130 by defconfig. If unsure, do not change. 1131 1132config MAX_CPUS 1133 int "Maximum number of CPUs permitted for MPC85xx" 1134 default 12 if ARCH_T4240 1135 default 8 if ARCH_P4080 || \ 1136 ARCH_T4160 1137 default 4 if ARCH_B4860 || \ 1138 ARCH_P2041 || \ 1139 ARCH_P3041 || \ 1140 ARCH_P5040 || \ 1141 ARCH_T1040 || \ 1142 ARCH_T1042 || \ 1143 ARCH_T2080 || \ 1144 ARCH_T2081 1145 default 2 if ARCH_B4420 || \ 1146 ARCH_BSC9132 || \ 1147 ARCH_MPC8572 || \ 1148 ARCH_P1020 || \ 1149 ARCH_P1021 || \ 1150 ARCH_P1022 || \ 1151 ARCH_P1023 || \ 1152 ARCH_P1024 || \ 1153 ARCH_P1025 || \ 1154 ARCH_P2020 || \ 1155 ARCH_P5020 || \ 1156 ARCH_T1023 || \ 1157 ARCH_T1024 1158 default 1 1159 help 1160 Set this number to the maximum number of possible CPUs in the SoC. 1161 SoCs may have multiple clusters with each cluster may have multiple 1162 ports. If some ports are reserved but higher ports are used for 1163 cores, count the reserved ports. This will allocate enough memory 1164 in spin table to properly handle all cores. 1165 1166config SYS_CCSRBAR_DEFAULT 1167 hex "Default CCSRBAR address" 1168 default 0xff700000 if ARCH_BSC9131 || \ 1169 ARCH_BSC9132 || \ 1170 ARCH_C29X || \ 1171 ARCH_MPC8536 || \ 1172 ARCH_MPC8540 || \ 1173 ARCH_MPC8541 || \ 1174 ARCH_MPC8544 || \ 1175 ARCH_MPC8548 || \ 1176 ARCH_MPC8555 || \ 1177 ARCH_MPC8560 || \ 1178 ARCH_MPC8568 || \ 1179 ARCH_MPC8569 || \ 1180 ARCH_MPC8572 || \ 1181 ARCH_P1010 || \ 1182 ARCH_P1011 || \ 1183 ARCH_P1020 || \ 1184 ARCH_P1021 || \ 1185 ARCH_P1022 || \ 1186 ARCH_P1024 || \ 1187 ARCH_P1025 || \ 1188 ARCH_P2020 1189 default 0xff600000 if ARCH_P1023 1190 default 0xfe000000 if ARCH_B4420 || \ 1191 ARCH_B4860 || \ 1192 ARCH_P2041 || \ 1193 ARCH_P3041 || \ 1194 ARCH_P4080 || \ 1195 ARCH_P5020 || \ 1196 ARCH_P5040 || \ 1197 ARCH_T1023 || \ 1198 ARCH_T1024 || \ 1199 ARCH_T1040 || \ 1200 ARCH_T1042 || \ 1201 ARCH_T2080 || \ 1202 ARCH_T2081 || \ 1203 ARCH_T4160 || \ 1204 ARCH_T4240 1205 default 0xe0000000 if ARCH_QEMU_E500 1206 help 1207 Default value of CCSRBAR comes from power-on-reset. It 1208 is fixed on each SoC. Some SoCs can have different value 1209 if changed by pre-boot regime. The value here must match 1210 the current value in SoC. If not sure, do not change. 1211 1212config SYS_FSL_ERRATUM_A004468 1213 bool 1214 1215config SYS_FSL_ERRATUM_A004477 1216 bool 1217 1218config SYS_FSL_ERRATUM_A004508 1219 bool 1220 1221config SYS_FSL_ERRATUM_A004580 1222 bool 1223 1224config SYS_FSL_ERRATUM_A004699 1225 bool 1226 1227config SYS_FSL_ERRATUM_A004849 1228 bool 1229 1230config SYS_FSL_ERRATUM_A004510 1231 bool 1232 1233config SYS_FSL_ERRATUM_A004510_SVR_REV 1234 hex 1235 depends on SYS_FSL_ERRATUM_A004510 1236 default 0x20 if ARCH_P4080 1237 default 0x10 1238 1239config SYS_FSL_ERRATUM_A004510_SVR_REV2 1240 hex 1241 depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041)) 1242 default 0x11 1243 1244config SYS_FSL_ERRATUM_A005125 1245 bool 1246 1247config SYS_FSL_ERRATUM_A005434 1248 bool 1249 1250config SYS_FSL_ERRATUM_A005812 1251 bool 1252 1253config SYS_FSL_ERRATUM_A005871 1254 bool 1255 1256config SYS_FSL_ERRATUM_A006261 1257 bool 1258 1259config SYS_FSL_ERRATUM_A006379 1260 bool 1261 1262config SYS_FSL_ERRATUM_A006384 1263 bool 1264 1265config SYS_FSL_ERRATUM_A006475 1266 bool 1267 1268config SYS_FSL_ERRATUM_A006593 1269 bool 1270 1271config SYS_FSL_ERRATUM_A007075 1272 bool 1273 1274config SYS_FSL_ERRATUM_A007186 1275 bool 1276 1277config SYS_FSL_ERRATUM_A007212 1278 bool 1279 1280config SYS_FSL_ERRATUM_A007815 1281 bool 1282 1283config SYS_FSL_ERRATUM_A007798 1284 bool 1285 1286config SYS_FSL_ERRATUM_A007907 1287 bool 1288 1289config SYS_FSL_ERRATUM_A008044 1290 bool 1291 1292config SYS_FSL_ERRATUM_CPC_A002 1293 bool 1294 1295config SYS_FSL_ERRATUM_CPC_A003 1296 bool 1297 1298config SYS_FSL_ERRATUM_CPU_A003999 1299 bool 1300 1301config SYS_FSL_ERRATUM_ELBC_A001 1302 bool 1303 1304config SYS_FSL_ERRATUM_I2C_A004447 1305 bool 1306 1307config SYS_FSL_A004447_SVR_REV 1308 hex 1309 depends on SYS_FSL_ERRATUM_I2C_A004447 1310 default 0x00 if ARCH_MPC8548 1311 default 0x10 if ARCH_P1010 1312 default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132 1313 default 0x20 if ARCH_P3041 || ARCH_P4080 || ARCH_P5020 1314 1315config SYS_FSL_ERRATUM_IFC_A002769 1316 bool 1317 1318config SYS_FSL_ERRATUM_IFC_A003399 1319 bool 1320 1321config SYS_FSL_ERRATUM_NMG_CPU_A011 1322 bool 1323 1324config SYS_FSL_ERRATUM_NMG_ETSEC129 1325 bool 1326 1327config SYS_FSL_ERRATUM_NMG_LBC103 1328 bool 1329 1330config SYS_FSL_ERRATUM_P1010_A003549 1331 bool 1332 1333config SYS_FSL_ERRATUM_SATA_A001 1334 bool 1335 1336config SYS_FSL_ERRATUM_SEC_A003571 1337 bool 1338 1339config SYS_FSL_ERRATUM_SRIO_A004034 1340 bool 1341 1342config SYS_FSL_ERRATUM_USB14 1343 bool 1344 1345config SYS_P4080_ERRATUM_CPU22 1346 bool 1347 1348config SYS_P4080_ERRATUM_PCIE_A003 1349 bool 1350 1351config SYS_P4080_ERRATUM_SERDES8 1352 bool 1353 1354config SYS_P4080_ERRATUM_SERDES9 1355 bool 1356 1357config SYS_P4080_ERRATUM_SERDES_A001 1358 bool 1359 1360config SYS_P4080_ERRATUM_SERDES_A005 1361 bool 1362 1363config SYS_FSL_QORIQ_CHASSIS1 1364 bool 1365 1366config SYS_FSL_QORIQ_CHASSIS2 1367 bool 1368 1369config SYS_FSL_NUM_LAWS 1370 int "Number of local access windows" 1371 depends on FSL_LAW 1372 default 32 if ARCH_B4420 || \ 1373 ARCH_B4860 || \ 1374 ARCH_P2041 || \ 1375 ARCH_P3041 || \ 1376 ARCH_P4080 || \ 1377 ARCH_P5020 || \ 1378 ARCH_P5040 || \ 1379 ARCH_T2080 || \ 1380 ARCH_T2081 || \ 1381 ARCH_T4160 || \ 1382 ARCH_T4240 1383 default 16 if ARCH_T1023 || \ 1384 ARCH_T1024 || \ 1385 ARCH_T1040 || \ 1386 ARCH_T1042 1387 default 12 if ARCH_BSC9131 || \ 1388 ARCH_BSC9132 || \ 1389 ARCH_C29X || \ 1390 ARCH_MPC8536 || \ 1391 ARCH_MPC8572 || \ 1392 ARCH_P1010 || \ 1393 ARCH_P1011 || \ 1394 ARCH_P1020 || \ 1395 ARCH_P1021 || \ 1396 ARCH_P1022 || \ 1397 ARCH_P1023 || \ 1398 ARCH_P1024 || \ 1399 ARCH_P1025 || \ 1400 ARCH_P2020 1401 default 10 if ARCH_MPC8544 || \ 1402 ARCH_MPC8548 || \ 1403 ARCH_MPC8568 || \ 1404 ARCH_MPC8569 1405 default 8 if ARCH_MPC8540 || \ 1406 ARCH_MPC8541 || \ 1407 ARCH_MPC8555 || \ 1408 ARCH_MPC8560 1409 help 1410 Number of local access windows. This is fixed per SoC. 1411 If not sure, do not change. 1412 1413config SYS_FSL_THREADS_PER_CORE 1414 int 1415 default 2 if E6500 1416 default 1 1417 1418config SYS_NUM_TLBCAMS 1419 int "Number of TLB CAM entries" 1420 default 64 if E500MC 1421 default 16 1422 help 1423 Number of TLB CAM entries for Book-E chips. 64 for E500MC, 1424 16 for other E500 SoCs. 1425 1426config SYS_PPC64 1427 bool 1428 1429config SYS_PPC_E500_USE_DEBUG_TLB 1430 bool 1431 1432config FSL_IFC 1433 bool 1434 1435config FSL_ELBC 1436 bool 1437 1438config SYS_PPC_E500_DEBUG_TLB 1439 int "Temporary TLB entry for external debugger" 1440 depends on SYS_PPC_E500_USE_DEBUG_TLB 1441 default 0 if ARCH_MPC8544 || ARCH_MPC8548 1442 default 1 if ARCH_MPC8536 1443 default 2 if ARCH_MPC8572 || \ 1444 ARCH_P1011 || \ 1445 ARCH_P1020 || \ 1446 ARCH_P1021 || \ 1447 ARCH_P1022 || \ 1448 ARCH_P1024 || \ 1449 ARCH_P1025 || \ 1450 ARCH_P2020 1451 default 3 if ARCH_P1010 || \ 1452 ARCH_BSC9132 || \ 1453 ARCH_C29X 1454 help 1455 Select a temporary TLB entry to be used during boot to work 1456 around limitations in e500v1 and e500v2 external debugger 1457 support. This reduces the portions of the boot code where 1458 breakpoints and single stepping do not work. The value of this 1459 symbol should be set to the TLB1 entry to be used for this 1460 purpose. If unsure, do not change. 1461 1462config SYS_FSL_IFC_CLK_DIV 1463 int "Divider of platform clock" 1464 depends on FSL_IFC 1465 default 2 if ARCH_B4420 || \ 1466 ARCH_B4860 || \ 1467 ARCH_T1024 || \ 1468 ARCH_T1023 || \ 1469 ARCH_T1040 || \ 1470 ARCH_T1042 || \ 1471 ARCH_T4160 || \ 1472 ARCH_T4240 1473 default 1 1474 help 1475 Defines divider of platform clock(clock input to 1476 IFC controller). 1477 1478config SYS_FSL_LBC_CLK_DIV 1479 int "Divider of platform clock" 1480 depends on FSL_ELBC || ARCH_MPC8540 || \ 1481 ARCH_MPC8548 || ARCH_MPC8541 || \ 1482 ARCH_MPC8555 || ARCH_MPC8560 || \ 1483 ARCH_MPC8568 1484 1485 default 2 if ARCH_P2041 || \ 1486 ARCH_P3041 || \ 1487 ARCH_P4080 || \ 1488 ARCH_P5020 || \ 1489 ARCH_P5040 1490 default 1 1491 1492 help 1493 Defines divider of platform clock(clock input to 1494 eLBC controller). 1495 1496source "board/freescale/b4860qds/Kconfig" 1497source "board/freescale/bsc9131rdb/Kconfig" 1498source "board/freescale/bsc9132qds/Kconfig" 1499source "board/freescale/c29xpcie/Kconfig" 1500source "board/freescale/corenet_ds/Kconfig" 1501source "board/freescale/mpc8536ds/Kconfig" 1502source "board/freescale/mpc8541cds/Kconfig" 1503source "board/freescale/mpc8544ds/Kconfig" 1504source "board/freescale/mpc8548cds/Kconfig" 1505source "board/freescale/mpc8555cds/Kconfig" 1506source "board/freescale/mpc8568mds/Kconfig" 1507source "board/freescale/mpc8569mds/Kconfig" 1508source "board/freescale/mpc8572ds/Kconfig" 1509source "board/freescale/p1010rdb/Kconfig" 1510source "board/freescale/p1022ds/Kconfig" 1511source "board/freescale/p1023rdb/Kconfig" 1512source "board/freescale/p1_p2_rdb_pc/Kconfig" 1513source "board/freescale/p1_twr/Kconfig" 1514source "board/freescale/p2041rdb/Kconfig" 1515source "board/freescale/qemu-ppce500/Kconfig" 1516source "board/freescale/t102xqds/Kconfig" 1517source "board/freescale/t102xrdb/Kconfig" 1518source "board/freescale/t1040qds/Kconfig" 1519source "board/freescale/t104xrdb/Kconfig" 1520source "board/freescale/t208xqds/Kconfig" 1521source "board/freescale/t208xrdb/Kconfig" 1522source "board/freescale/t4qds/Kconfig" 1523source "board/freescale/t4rdb/Kconfig" 1524source "board/gdsys/p1022/Kconfig" 1525source "board/keymile/kmp204x/Kconfig" 1526source "board/sbc8548/Kconfig" 1527source "board/socrates/Kconfig" 1528source "board/varisys/cyrus/Kconfig" 1529source "board/xes/xpedite520x/Kconfig" 1530source "board/xes/xpedite537x/Kconfig" 1531source "board/xes/xpedite550x/Kconfig" 1532source "board/Arcturus/ucp1020/Kconfig" 1533 1534endmenu 1535