1*06f60ae3SScott Wood /* 2*06f60ae3SScott Wood * Copyright (C) 2004-2008 Freescale Semiconductor, Inc. 3*06f60ae3SScott Wood * 4*06f60ae3SScott Wood * See file CREDITS for list of people who contributed to this 5*06f60ae3SScott Wood * project. 6*06f60ae3SScott Wood * 7*06f60ae3SScott Wood * This program is free software; you can redistribute it and/or 8*06f60ae3SScott Wood * modify it under the terms of the GNU General Public License as 9*06f60ae3SScott Wood * published by the Free Software Foundation; either version 2 of 10*06f60ae3SScott Wood * the License, or (at your option) any later version. 11*06f60ae3SScott Wood * 12*06f60ae3SScott Wood * This program is distributed in the hope that it will be useful, 13*06f60ae3SScott Wood * but WITHOUT ANY WARRANTY; without even the implied warranty of 14*06f60ae3SScott Wood * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15*06f60ae3SScott Wood * GNU General Public License for more details. 16*06f60ae3SScott Wood * 17*06f60ae3SScott Wood * You should have received a copy of the GNU General Public License 18*06f60ae3SScott Wood * along with this program; if not, write to the Free Software 19*06f60ae3SScott Wood * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20*06f60ae3SScott Wood * MA 02111-1307 USA 21*06f60ae3SScott Wood */ 22*06f60ae3SScott Wood 23*06f60ae3SScott Wood #include <common.h> 24*06f60ae3SScott Wood #include <mpc83xx.h> 25*06f60ae3SScott Wood 26*06f60ae3SScott Wood DECLARE_GLOBAL_DATA_PTR; 27*06f60ae3SScott Wood 28*06f60ae3SScott Wood /* 29*06f60ae3SScott Wood * Breathe some life into the CPU... 30*06f60ae3SScott Wood * 31*06f60ae3SScott Wood * Set up the memory map, 32*06f60ae3SScott Wood * initialize a bunch of registers, 33*06f60ae3SScott Wood * initialize the UPM's 34*06f60ae3SScott Wood */ 35*06f60ae3SScott Wood void cpu_init_f (volatile immap_t * im) 36*06f60ae3SScott Wood { 37*06f60ae3SScott Wood int i; 38*06f60ae3SScott Wood 39*06f60ae3SScott Wood /* Pointer is writable since we allocated a register for it */ 40*06f60ae3SScott Wood gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); 41*06f60ae3SScott Wood 42*06f60ae3SScott Wood /* Clear initial global data */ 43*06f60ae3SScott Wood for (i = 0; i < sizeof(gd_t); i++) 44*06f60ae3SScott Wood ((char *)gd)[i] = 0; 45*06f60ae3SScott Wood 46*06f60ae3SScott Wood /* system performance tweaking */ 47*06f60ae3SScott Wood 48*06f60ae3SScott Wood #ifdef CONFIG_SYS_ACR_PIPE_DEP 49*06f60ae3SScott Wood /* Arbiter pipeline depth */ 50*06f60ae3SScott Wood im->arbiter.acr = (im->arbiter.acr & ~ACR_PIPE_DEP) | 51*06f60ae3SScott Wood (CONFIG_SYS_ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT); 52*06f60ae3SScott Wood #endif 53*06f60ae3SScott Wood 54*06f60ae3SScott Wood #ifdef CONFIG_SYS_ACR_RPTCNT 55*06f60ae3SScott Wood /* Arbiter repeat count */ 56*06f60ae3SScott Wood im->arbiter.acr = (im->arbiter.acr & ~(ACR_RPTCNT)) | 57*06f60ae3SScott Wood (CONFIG_SYS_ACR_RPTCNT << ACR_RPTCNT_SHIFT); 58*06f60ae3SScott Wood #endif 59*06f60ae3SScott Wood 60*06f60ae3SScott Wood #ifdef CONFIG_SYS_SPCR_OPT 61*06f60ae3SScott Wood /* Optimize transactions between CSB and other devices */ 62*06f60ae3SScott Wood im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_OPT) | 63*06f60ae3SScott Wood (CONFIG_SYS_SPCR_OPT << SPCR_OPT_SHIFT); 64*06f60ae3SScott Wood #endif 65*06f60ae3SScott Wood 66*06f60ae3SScott Wood /* Enable Time Base & Decrimenter (so we will have udelay()) */ 67*06f60ae3SScott Wood im->sysconf.spcr |= SPCR_TBEN; 68*06f60ae3SScott Wood 69*06f60ae3SScott Wood /* DDR control driver register */ 70*06f60ae3SScott Wood #ifdef CONFIG_SYS_DDRCDR 71*06f60ae3SScott Wood im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR; 72*06f60ae3SScott Wood #endif 73*06f60ae3SScott Wood /* Output buffer impedance register */ 74*06f60ae3SScott Wood #ifdef CONFIG_SYS_OBIR 75*06f60ae3SScott Wood im->sysconf.obir = CONFIG_SYS_OBIR; 76*06f60ae3SScott Wood #endif 77*06f60ae3SScott Wood 78*06f60ae3SScott Wood /* 79*06f60ae3SScott Wood * Memory Controller: 80*06f60ae3SScott Wood */ 81*06f60ae3SScott Wood 82*06f60ae3SScott Wood /* Map banks 0 and 1 to the FLASH banks 0 and 1 at preliminary 83*06f60ae3SScott Wood * addresses - these have to be modified later when FLASH size 84*06f60ae3SScott Wood * has been determined 85*06f60ae3SScott Wood */ 86*06f60ae3SScott Wood 87*06f60ae3SScott Wood #if defined(CONFIG_SYS_NAND_BR_PRELIM) \ 88*06f60ae3SScott Wood && defined(CONFIG_SYS_NAND_OR_PRELIM) \ 89*06f60ae3SScott Wood && defined(CONFIG_SYS_NAND_LBLAWBAR_PRELIM) \ 90*06f60ae3SScott Wood && defined(CONFIG_SYS_NAND_LBLAWAR_PRELIM) 91*06f60ae3SScott Wood set_lbc_br(0, CONFIG_SYS_NAND_BR_PRELIM); 92*06f60ae3SScott Wood set_lbc_or(0, CONFIG_SYS_NAND_OR_PRELIM); 93*06f60ae3SScott Wood im->sysconf.lblaw[0].bar = CONFIG_SYS_NAND_LBLAWBAR_PRELIM; 94*06f60ae3SScott Wood im->sysconf.lblaw[0].ar = CONFIG_SYS_NAND_LBLAWAR_PRELIM; 95*06f60ae3SScott Wood #else 96*06f60ae3SScott Wood #error CONFIG_SYS_NAND_BR_PRELIM, CONFIG_SYS_NAND_OR_PRELIM, CONFIG_SYS_NAND_LBLAWBAR_PRELIM & CONFIG_SYS_NAND_LBLAWAR_PRELIM must be defined 97*06f60ae3SScott Wood #endif 98*06f60ae3SScott Wood } 99*06f60ae3SScott Wood 100*06f60ae3SScott Wood /* 101*06f60ae3SScott Wood * Get timebase clock frequency (like cpu_clk in Hz) 102*06f60ae3SScott Wood */ 103*06f60ae3SScott Wood unsigned long get_tbclk(void) 104*06f60ae3SScott Wood { 105*06f60ae3SScott Wood return (gd->bus_clk + 3L) / 4L; 106*06f60ae3SScott Wood } 107*06f60ae3SScott Wood 108*06f60ae3SScott Wood void puts(const char *str) 109*06f60ae3SScott Wood { 110*06f60ae3SScott Wood while (*str) 111*06f60ae3SScott Wood putc(*str++); 112*06f60ae3SScott Wood } 113