xref: /openbmc/u-boot/arch/powerpc/cpu/mpc83xx/spl_minimal.c (revision 83d290c56fab2d38cd1ab4c4cc7099559c1d5046)
1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
206f60ae3SScott Wood /*
306f60ae3SScott Wood  * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
406f60ae3SScott Wood  */
506f60ae3SScott Wood 
606f60ae3SScott Wood #include <common.h>
706f60ae3SScott Wood #include <mpc83xx.h>
806f60ae3SScott Wood 
906f60ae3SScott Wood DECLARE_GLOBAL_DATA_PTR;
1006f60ae3SScott Wood 
1106f60ae3SScott Wood /*
1206f60ae3SScott Wood  * Breathe some life into the CPU...
1306f60ae3SScott Wood  *
1406f60ae3SScott Wood  * Set up the memory map,
1506f60ae3SScott Wood  * initialize a bunch of registers,
1606f60ae3SScott Wood  * initialize the UPM's
1706f60ae3SScott Wood  */
cpu_init_f(volatile immap_t * im)1806f60ae3SScott Wood void cpu_init_f (volatile immap_t * im)
1906f60ae3SScott Wood {
2006f60ae3SScott Wood 	/* Pointer is writable since we allocated a register for it */
2106f60ae3SScott Wood 	gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
2206f60ae3SScott Wood 
23dbcb2c0eSmario.six@gdsys.cc 	/* global data region was cleared in start.S */
2406f60ae3SScott Wood 
2506f60ae3SScott Wood 	/* system performance tweaking */
2606f60ae3SScott Wood 
2706f60ae3SScott Wood #ifdef CONFIG_SYS_ACR_PIPE_DEP
2806f60ae3SScott Wood 	/* Arbiter pipeline depth */
2906f60ae3SScott Wood 	im->arbiter.acr = (im->arbiter.acr & ~ACR_PIPE_DEP) |
3006f60ae3SScott Wood 			  (CONFIG_SYS_ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT);
3106f60ae3SScott Wood #endif
3206f60ae3SScott Wood 
3306f60ae3SScott Wood #ifdef CONFIG_SYS_ACR_RPTCNT
3406f60ae3SScott Wood 	/* Arbiter repeat count */
3506f60ae3SScott Wood 	im->arbiter.acr = (im->arbiter.acr & ~(ACR_RPTCNT)) |
3606f60ae3SScott Wood 			  (CONFIG_SYS_ACR_RPTCNT << ACR_RPTCNT_SHIFT);
3706f60ae3SScott Wood #endif
3806f60ae3SScott Wood 
3906f60ae3SScott Wood #ifdef CONFIG_SYS_SPCR_OPT
4006f60ae3SScott Wood 	/* Optimize transactions between CSB and other devices */
4106f60ae3SScott Wood 	im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_OPT) |
4206f60ae3SScott Wood 			   (CONFIG_SYS_SPCR_OPT << SPCR_OPT_SHIFT);
4306f60ae3SScott Wood #endif
4406f60ae3SScott Wood 
45d7b4ca2bSRobert P. J. Day 	/* Enable Time Base & Decrementer (so we will have udelay()) */
4606f60ae3SScott Wood 	im->sysconf.spcr |= SPCR_TBEN;
4706f60ae3SScott Wood 
4806f60ae3SScott Wood 	/* DDR control driver register */
4906f60ae3SScott Wood #ifdef CONFIG_SYS_DDRCDR
5006f60ae3SScott Wood 	im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR;
5106f60ae3SScott Wood #endif
5206f60ae3SScott Wood 	/* Output buffer impedance register */
5306f60ae3SScott Wood #ifdef CONFIG_SYS_OBIR
5406f60ae3SScott Wood 	im->sysconf.obir = CONFIG_SYS_OBIR;
5506f60ae3SScott Wood #endif
5606f60ae3SScott Wood 
5706f60ae3SScott Wood 	/*
5806f60ae3SScott Wood 	 * Memory Controller:
5906f60ae3SScott Wood 	 */
6006f60ae3SScott Wood 
6106f60ae3SScott Wood 	/* Map banks 0 and 1 to the FLASH banks 0 and 1 at preliminary
6206f60ae3SScott Wood 	 * addresses - these have to be modified later when FLASH size
6306f60ae3SScott Wood 	 * has been determined
6406f60ae3SScott Wood 	 */
6506f60ae3SScott Wood 
6606f60ae3SScott Wood #if defined(CONFIG_SYS_NAND_BR_PRELIM)  \
6706f60ae3SScott Wood 	&& defined(CONFIG_SYS_NAND_OR_PRELIM) \
6806f60ae3SScott Wood 	&& defined(CONFIG_SYS_NAND_LBLAWBAR_PRELIM) \
6906f60ae3SScott Wood 	&& defined(CONFIG_SYS_NAND_LBLAWAR_PRELIM)
7006f60ae3SScott Wood 	set_lbc_br(0, CONFIG_SYS_NAND_BR_PRELIM);
7106f60ae3SScott Wood 	set_lbc_or(0, CONFIG_SYS_NAND_OR_PRELIM);
7206f60ae3SScott Wood 	im->sysconf.lblaw[0].bar = CONFIG_SYS_NAND_LBLAWBAR_PRELIM;
7306f60ae3SScott Wood 	im->sysconf.lblaw[0].ar = CONFIG_SYS_NAND_LBLAWAR_PRELIM;
7406f60ae3SScott Wood #else
7506f60ae3SScott Wood #error CONFIG_SYS_NAND_BR_PRELIM, CONFIG_SYS_NAND_OR_PRELIM, CONFIG_SYS_NAND_LBLAWBAR_PRELIM & CONFIG_SYS_NAND_LBLAWAR_PRELIM must be defined
7606f60ae3SScott Wood #endif
7706f60ae3SScott Wood }
7806f60ae3SScott Wood 
7906f60ae3SScott Wood /*
8006f60ae3SScott Wood  * Get timebase clock frequency (like cpu_clk in Hz)
8106f60ae3SScott Wood  */
get_tbclk(void)8206f60ae3SScott Wood unsigned long get_tbclk(void)
8306f60ae3SScott Wood {
8406f60ae3SScott Wood 	return (gd->bus_clk + 3L) / 4L;
8506f60ae3SScott Wood }
8606f60ae3SScott Wood 
puts(const char * str)8706f60ae3SScott Wood void puts(const char *str)
8806f60ae3SScott Wood {
8906f60ae3SScott Wood 	while (*str)
9006f60ae3SScott Wood 		putc(*str++);
9106f60ae3SScott Wood }
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