1 #ifndef __ASM_NIOS2_DMA_MAPPING_H 2 #define __ASM_NIOS2_DMA_MAPPING_H 3 4 /* dma_alloc_coherent() return cache-line aligned allocation which is mapped 5 * to uncached io region. 6 * 7 * IO_REGION_BASE should be defined in board config header file 8 * 0x80000000 for nommu, 0xe0000000 for mmu 9 */ 10 11 static inline void *dma_alloc_coherent(size_t len, unsigned long *handle) 12 { 13 void *addr = malloc(len + CONFIG_SYS_DCACHELINE_SIZE); 14 if (!addr) 15 return 0; 16 flush_dcache((unsigned long)addr, len + CONFIG_SYS_DCACHELINE_SIZE); 17 *handle = ((unsigned long)addr + 18 (CONFIG_SYS_DCACHELINE_SIZE - 1)) & 19 ~(CONFIG_SYS_DCACHELINE_SIZE - 1) & ~(IO_REGION_BASE); 20 return (void *)(*handle | IO_REGION_BASE); 21 } 22 23 #endif /* __ASM_NIOS2_DMA_MAPPING_H */ 24