100f892fcSMacpaul Lin /* 200f892fcSMacpaul Lin * Copyright (C) 2011 Andes Technology Corporation 300f892fcSMacpaul Lin * Copyright (C) 2010 Shawn Lin (nobuhiro@andestech.com) 400f892fcSMacpaul Lin * Copyright (C) 2011 Macpaul Lin (macpaul@andestech.com) 500f892fcSMacpaul Lin * 600f892fcSMacpaul Lin * This program is free software; you can redistribute it and/or modify 700f892fcSMacpaul Lin * it under the terms of the GNU General Public License version 2 as 800f892fcSMacpaul Lin * published by the Free Software Foundation. 900f892fcSMacpaul Lin */ 1000f892fcSMacpaul Lin #ifndef __ASM_NDS_PTRACE_H 1100f892fcSMacpaul Lin #define __ASM_NDS_PTRACE_H 1200f892fcSMacpaul Lin 1300f892fcSMacpaul Lin #define USR_MODE 0x00 1400f892fcSMacpaul Lin #define SU_MODE 0x01 1500f892fcSMacpaul Lin #define HV_MODE 0x10 1600f892fcSMacpaul Lin #define MODE_MASK (0x03<<3) 1700f892fcSMacpaul Lin #define GIE_BIT 0x01 1800f892fcSMacpaul Lin 1900f892fcSMacpaul Lin #ifndef __ASSEMBLY__ 2000f892fcSMacpaul Lin 2100f892fcSMacpaul Lin /* this struct defines the way the registers are stored on the 2200f892fcSMacpaul Lin stack during a system call. */ 2300f892fcSMacpaul Lin 2400f892fcSMacpaul Lin #define NDS32_REG long 2500f892fcSMacpaul Lin 2600f892fcSMacpaul Lin struct pt_regs { 2700f892fcSMacpaul Lin NDS32_REG ir0; 2800f892fcSMacpaul Lin NDS32_REG ipsw; 2900f892fcSMacpaul Lin NDS32_REG ipc; 3000f892fcSMacpaul Lin NDS32_REG sp; 3100f892fcSMacpaul Lin NDS32_REG orig_r0; 3200f892fcSMacpaul Lin NDS32_REG pipsw; 3300f892fcSMacpaul Lin NDS32_REG pipc; 3400f892fcSMacpaul Lin NDS32_REG pp0; 3500f892fcSMacpaul Lin NDS32_REG pp1; 3600f892fcSMacpaul Lin NDS32_REG d0hi; 3700f892fcSMacpaul Lin NDS32_REG d0lo; 3800f892fcSMacpaul Lin NDS32_REG d1hi; 3900f892fcSMacpaul Lin NDS32_REG d1lo; 4000f892fcSMacpaul Lin NDS32_REG r[26]; /* r0 - r25 */ 41*b0c4fae4SMacpaul Lin NDS32_REG p0; /* r26 - used by OS */ 42*b0c4fae4SMacpaul Lin NDS32_REG p1; /* r27 - used by OS */ 4300f892fcSMacpaul Lin NDS32_REG fp; /* r28 */ 4400f892fcSMacpaul Lin NDS32_REG gp; /* r29 */ 4500f892fcSMacpaul Lin NDS32_REG lp; /* r30 */ 4600f892fcSMacpaul Lin NDS32_REG fucop_ctl; 4700f892fcSMacpaul Lin NDS32_REG osp; 4800f892fcSMacpaul Lin }; 4900f892fcSMacpaul Lin 5000f892fcSMacpaul Lin #define processor_mode(regs) \ 5100f892fcSMacpaul Lin (((regs)->ipsw & MODE_MASK) >> 3) 5200f892fcSMacpaul Lin 5300f892fcSMacpaul Lin #define interrupts_enabled(regs) \ 5400f892fcSMacpaul Lin ((regs)->ipsw & GIE_BIT) 5500f892fcSMacpaul Lin 5600f892fcSMacpaul Lin /* 5700f892fcSMacpaul Lin * Offsets used by 'ptrace' system call interface. 5800f892fcSMacpaul Lin * These can't be changed without breaking binary compatibility 5900f892fcSMacpaul Lin * with MkLinux, etc. 6000f892fcSMacpaul Lin */ 6100f892fcSMacpaul Lin #define PT_R0 0 6200f892fcSMacpaul Lin #define PT_R1 1 6300f892fcSMacpaul Lin #define PT_R2 2 6400f892fcSMacpaul Lin #define PT_R3 3 6500f892fcSMacpaul Lin #define PT_R4 4 6600f892fcSMacpaul Lin #define PT_R5 5 6700f892fcSMacpaul Lin #define PT_R6 6 6800f892fcSMacpaul Lin #define PT_R7 7 6900f892fcSMacpaul Lin #define PT_R8 8 7000f892fcSMacpaul Lin #define PT_R9 9 7100f892fcSMacpaul Lin #define PT_R10 10 7200f892fcSMacpaul Lin #define PT_R11 11 7300f892fcSMacpaul Lin #define PT_R12 12 7400f892fcSMacpaul Lin #define PT_R13 13 7500f892fcSMacpaul Lin #define PT_R14 14 7600f892fcSMacpaul Lin #define PT_R15 15 7700f892fcSMacpaul Lin #define PT_R16 16 7800f892fcSMacpaul Lin #define PT_R17 17 7900f892fcSMacpaul Lin #define PT_R18 18 8000f892fcSMacpaul Lin #define PT_R19 19 8100f892fcSMacpaul Lin #define PT_R20 20 8200f892fcSMacpaul Lin #define PT_R21 21 8300f892fcSMacpaul Lin #define PT_R22 22 8400f892fcSMacpaul Lin #define PT_R23 23 8500f892fcSMacpaul Lin #define PT_R24 24 8600f892fcSMacpaul Lin #define PT_R25 25 8700f892fcSMacpaul Lin 8800f892fcSMacpaul Lin #endif /* __ASSEMBLY__ */ 8900f892fcSMacpaul Lin 9000f892fcSMacpaul Lin #endif /* __ASM_NDS_PTRACE_H */ 91