xref: /openbmc/u-boot/arch/nds32/cpu/n1213/ag101/cpu.c (revision 83d290c56fab2d38cd1ab4c4cc7099559c1d5046)
1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2445a886dSMacpaul Lin /*
3445a886dSMacpaul Lin  * (C) Copyright 2002
4445a886dSMacpaul Lin  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
5445a886dSMacpaul Lin  * Marius Groeger <mgroeger@sysgo.de>
6445a886dSMacpaul Lin  *
7445a886dSMacpaul Lin  * (C) Copyright 2002
8445a886dSMacpaul Lin  * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
9445a886dSMacpaul Lin  *
10445a886dSMacpaul Lin  * Copyright (C) 2011 Andes Technology Corporation
11445a886dSMacpaul Lin  * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
12445a886dSMacpaul Lin  * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
13445a886dSMacpaul Lin  */
14445a886dSMacpaul Lin 
15445a886dSMacpaul Lin /* CPU specific code */
16445a886dSMacpaul Lin #include <common.h>
17445a886dSMacpaul Lin #include <command.h>
18445a886dSMacpaul Lin #include <watchdog.h>
19445a886dSMacpaul Lin #include <asm/cache.h>
20445a886dSMacpaul Lin 
21445a886dSMacpaul Lin #include <faraday/ftwdt010_wdt.h>
22445a886dSMacpaul Lin 
23445a886dSMacpaul Lin /*
24445a886dSMacpaul Lin  * cleanup_before_linux() is called just before we call linux
25445a886dSMacpaul Lin  * it prepares the processor for linux
26445a886dSMacpaul Lin  *
27445a886dSMacpaul Lin  * we disable interrupt and caches.
28445a886dSMacpaul Lin  */
cleanup_before_linux(void)29445a886dSMacpaul Lin int cleanup_before_linux(void)
30445a886dSMacpaul Lin {
31445a886dSMacpaul Lin 	disable_interrupts();
32445a886dSMacpaul Lin 
33445a886dSMacpaul Lin 	/* turn off I/D-cache */
34b841b6e9Srick 	cache_flush();
35445a886dSMacpaul Lin 	icache_disable();
36445a886dSMacpaul Lin 	dcache_disable();
37445a886dSMacpaul Lin 	return 0;
38445a886dSMacpaul Lin }
39445a886dSMacpaul Lin 
do_reset(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])40445a886dSMacpaul Lin int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
41445a886dSMacpaul Lin {
42445a886dSMacpaul Lin 	disable_interrupts();
43445a886dSMacpaul Lin 
44445a886dSMacpaul Lin 	/*
45445a886dSMacpaul Lin 	 * reset to the base addr of andesboot.
46445a886dSMacpaul Lin 	 * currently no ROM loader at addr 0.
47445a886dSMacpaul Lin 	 * do not use reset_cpu(0);
48445a886dSMacpaul Lin 	 */
49445a886dSMacpaul Lin #ifdef CONFIG_FTWDT010_WATCHDOG
50445a886dSMacpaul Lin 	/*
51445a886dSMacpaul Lin 	 * workaround: if we use CONFIG_HW_WATCHDOG with ftwdt010, will lead
52445a886dSMacpaul Lin 	 * automatic hardware reset when booting Linux.
53445a886dSMacpaul Lin 	 * Please do not use CONFIG_HW_WATCHDOG and WATCHDOG_RESET() here.
54445a886dSMacpaul Lin 	 */
55445a886dSMacpaul Lin 	ftwdt010_wdt_reset();
56445a886dSMacpaul Lin 	while (1)
57445a886dSMacpaul Lin 		;
58445a886dSMacpaul Lin #endif /* CONFIG_FTWDT010_WATCHDOG */
59445a886dSMacpaul Lin 
60445a886dSMacpaul Lin 	/*NOTREACHED*/
61445a886dSMacpaul Lin }
62