1dd84058dSMasahiro Yamadamenu "MIPS architecture" 2dd84058dSMasahiro Yamada depends on MIPS 3dd84058dSMasahiro Yamada 4dd84058dSMasahiro Yamadaconfig SYS_ARCH 5dd84058dSMasahiro Yamada default "mips" 6dd84058dSMasahiro Yamada 7b9863b6dSDaniel Schwierzeckconfig SYS_CPU 8b9863b6dSDaniel Schwierzeck default "mips32" if CPU_MIPS32_R1 || CPU_MIPS32_R2 9b9863b6dSDaniel Schwierzeck default "mips64" if CPU_MIPS64_R1 || CPU_MIPS64_R2 10b9863b6dSDaniel Schwierzeck 117bfd5ee1SMasahiro Yamadaconfig USE_PRIVATE_LIBGCC 127bfd5ee1SMasahiro Yamada default y 137bfd5ee1SMasahiro Yamada 14dd84058dSMasahiro Yamadachoice 15dd84058dSMasahiro Yamada prompt "Target select" 16dd84058dSMasahiro Yamada 17dd84058dSMasahiro Yamadaconfig TARGET_QEMU_MIPS 18dd84058dSMasahiro Yamada bool "Support qemu-mips" 190e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 200e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 2102611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 2202611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 23aa45f75eSDaniel Schwierzeck select SUPPORTS_CPU_MIPS64_R1 24aa45f75eSDaniel Schwierzeck select SUPPORTS_CPU_MIPS64_R2 25dd84058dSMasahiro Yamada 26dd84058dSMasahiro Yamadaconfig TARGET_MALTA 27dd84058dSMasahiro Yamada bool "Support malta" 280e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 290e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 3002611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 3102611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 329d638eeaSDaniel Schwierzeck select SWAP_IO_SPACE 33dd84058dSMasahiro Yamada 34dd84058dSMasahiro Yamadaconfig TARGET_VCT 35dd84058dSMasahiro Yamada bool "Support vct" 360e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 3702611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 3802611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 39*dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 40dd84058dSMasahiro Yamada 41dd84058dSMasahiro Yamadaconfig TARGET_DBAU1X00 42dd84058dSMasahiro Yamada bool "Support dbau1x00" 430e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 440e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 4502611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 4602611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 47*dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 48dd84058dSMasahiro Yamada 49dd84058dSMasahiro Yamadaconfig TARGET_PB1X00 50dd84058dSMasahiro Yamada bool "Support pb1x00" 510e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 5202611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 5302611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 54*dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 55dd84058dSMasahiro Yamada 56dd84058dSMasahiro Yamada 57dd84058dSMasahiro Yamadaendchoice 58dd84058dSMasahiro Yamada 59dd84058dSMasahiro Yamadasource "board/dbau1x00/Kconfig" 60dd84058dSMasahiro Yamadasource "board/imgtec/malta/Kconfig" 61dd84058dSMasahiro Yamadasource "board/micronas/vct/Kconfig" 62dd84058dSMasahiro Yamadasource "board/pb1x00/Kconfig" 63dd84058dSMasahiro Yamadasource "board/qemu-mips/Kconfig" 64dd84058dSMasahiro Yamada 650e1dc345SDaniel Schwierzeckif MIPS 660e1dc345SDaniel Schwierzeck 670e1dc345SDaniel Schwierzeckchoice 680e1dc345SDaniel Schwierzeck prompt "Endianness selection" 690e1dc345SDaniel Schwierzeck help 700e1dc345SDaniel Schwierzeck Some MIPS boards can be configured for either little or big endian 710e1dc345SDaniel Schwierzeck byte order. These modes require different U-Boot images. In general there 720e1dc345SDaniel Schwierzeck is one preferred byteorder for a particular system but some systems are 730e1dc345SDaniel Schwierzeck just as commonly used in the one or the other endianness. 740e1dc345SDaniel Schwierzeck 750e1dc345SDaniel Schwierzeckconfig SYS_BIG_ENDIAN 760e1dc345SDaniel Schwierzeck bool "Big endian" 770e1dc345SDaniel Schwierzeck depends on SUPPORTS_BIG_ENDIAN 780e1dc345SDaniel Schwierzeck 790e1dc345SDaniel Schwierzeckconfig SYS_LITTLE_ENDIAN 800e1dc345SDaniel Schwierzeck bool "Little endian" 810e1dc345SDaniel Schwierzeck depends on SUPPORTS_LITTLE_ENDIAN 820e1dc345SDaniel Schwierzeck 830e1dc345SDaniel Schwierzeckendchoice 840e1dc345SDaniel Schwierzeck 8502611cbbSDaniel Schwierzeckchoice 8602611cbbSDaniel Schwierzeck prompt "CPU selection" 8702611cbbSDaniel Schwierzeck default CPU_MIPS32_R2 8802611cbbSDaniel Schwierzeck 8902611cbbSDaniel Schwierzeckconfig CPU_MIPS32_R1 9002611cbbSDaniel Schwierzeck bool "MIPS32 Release 1" 9102611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS32_R1 9202611cbbSDaniel Schwierzeck select 32BIT 9302611cbbSDaniel Schwierzeck help 9402611cbbSDaniel Schwierzeck Choose this option to build an U-Boot for release 1 or later of the 9502611cbbSDaniel Schwierzeck MIPS32 architecture. 9602611cbbSDaniel Schwierzeck 9702611cbbSDaniel Schwierzeckconfig CPU_MIPS32_R2 9802611cbbSDaniel Schwierzeck bool "MIPS32 Release 2" 9902611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS32_R2 10002611cbbSDaniel Schwierzeck select 32BIT 10102611cbbSDaniel Schwierzeck help 10202611cbbSDaniel Schwierzeck Choose this option to build an U-Boot for release 2 or later of the 10302611cbbSDaniel Schwierzeck MIPS32 architecture. 10402611cbbSDaniel Schwierzeck 10502611cbbSDaniel Schwierzeckconfig CPU_MIPS64_R1 10602611cbbSDaniel Schwierzeck bool "MIPS64 Release 1" 10702611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS64_R1 10802611cbbSDaniel Schwierzeck select 64BIT 10902611cbbSDaniel Schwierzeck help 11002611cbbSDaniel Schwierzeck Choose this option to build a kernel for release 1 or later of the 11102611cbbSDaniel Schwierzeck MIPS64 architecture. 11202611cbbSDaniel Schwierzeck 11302611cbbSDaniel Schwierzeckconfig CPU_MIPS64_R2 11402611cbbSDaniel Schwierzeck bool "MIPS64 Release 2" 11502611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS64_R2 11602611cbbSDaniel Schwierzeck select 64BIT 11702611cbbSDaniel Schwierzeck help 11802611cbbSDaniel Schwierzeck Choose this option to build a kernel for release 2 or later of the 11902611cbbSDaniel Schwierzeck MIPS64 architecture. 12002611cbbSDaniel Schwierzeck 12102611cbbSDaniel Schwierzeckendchoice 12202611cbbSDaniel Schwierzeck 12325fc664fSDaniel Schwierzeckmenu "OS boot interface" 12425fc664fSDaniel Schwierzeck 12525fc664fSDaniel Schwierzeckconfig MIPS_BOOT_CMDLINE_LEGACY 12625fc664fSDaniel Schwierzeck bool "Hand over legacy command line to Linux kernel" 12725fc664fSDaniel Schwierzeck default y 12825fc664fSDaniel Schwierzeck help 12925fc664fSDaniel Schwierzeck Enable this option if you want U-Boot to hand over the Yamon-style 13025fc664fSDaniel Schwierzeck command line to the kernel. All bootargs will be prepared as argc/argv 13125fc664fSDaniel Schwierzeck compatible list. The argument count (argc) is stored in register $a0. 13225fc664fSDaniel Schwierzeck The address of the argument list (argv) is stored in register $a1. 13325fc664fSDaniel Schwierzeck 134ca65e585SDaniel Schwierzeckconfig MIPS_BOOT_ENV_LEGACY 135ca65e585SDaniel Schwierzeck bool "Hand over legacy environment to Linux kernel" 136ca65e585SDaniel Schwierzeck default y 137ca65e585SDaniel Schwierzeck help 138ca65e585SDaniel Schwierzeck Enable this option if you want U-Boot to hand over the Yamon-style 139ca65e585SDaniel Schwierzeck environment to the kernel. Information like memory size, initrd 140ca65e585SDaniel Schwierzeck address and size will be prepared as zero-terminated key/value list. 141ca65e585SDaniel Schwierzeck The address of the enviroment is stored in register $a2. 142ca65e585SDaniel Schwierzeck 1435002d8ccSDaniel Schwierzeckconfig MIPS_BOOT_FDT 1445002d8ccSDaniel Schwierzeck bool "Hand over a flattened device tree to Linux kernel (INCOMPLETE)" 1455002d8ccSDaniel Schwierzeck default n 1465002d8ccSDaniel Schwierzeck help 1475002d8ccSDaniel Schwierzeck Enable this option if you want U-Boot to hand over a flattened 1485002d8ccSDaniel Schwierzeck device tree to the kernel. 1495002d8ccSDaniel Schwierzeck 1505002d8ccSDaniel Schwierzeck Note: the final hand over to the kernel is not yet implemented. After 1515002d8ccSDaniel Schwierzeck the community agreed on the MIPS boot interface for device trees, 1525002d8ccSDaniel Schwierzeck the corresponding code will be added. 1535002d8ccSDaniel Schwierzeck 15425fc664fSDaniel Schwierzeckendmenu 15525fc664fSDaniel Schwierzeck 1560e1dc345SDaniel Schwierzeckconfig SUPPORTS_BIG_ENDIAN 1570e1dc345SDaniel Schwierzeck bool 1580e1dc345SDaniel Schwierzeck 1590e1dc345SDaniel Schwierzeckconfig SUPPORTS_LITTLE_ENDIAN 1600e1dc345SDaniel Schwierzeck bool 1610e1dc345SDaniel Schwierzeck 16202611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS32_R1 16302611cbbSDaniel Schwierzeck bool 16402611cbbSDaniel Schwierzeck 16502611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS32_R2 16602611cbbSDaniel Schwierzeck bool 16702611cbbSDaniel Schwierzeck 16802611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS64_R1 16902611cbbSDaniel Schwierzeck bool 17002611cbbSDaniel Schwierzeck 17102611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS64_R2 17202611cbbSDaniel Schwierzeck bool 17302611cbbSDaniel Schwierzeck 174c57dafb5SDaniel Schwierzeckconfig CPU_MIPS32 175c57dafb5SDaniel Schwierzeck bool 176c57dafb5SDaniel Schwierzeck default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 177c57dafb5SDaniel Schwierzeck 178c57dafb5SDaniel Schwierzeckconfig CPU_MIPS64 179c57dafb5SDaniel Schwierzeck bool 180c57dafb5SDaniel Schwierzeck default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 181c57dafb5SDaniel Schwierzeck 18202611cbbSDaniel Schwierzeckconfig 32BIT 18302611cbbSDaniel Schwierzeck bool 18402611cbbSDaniel Schwierzeck 18502611cbbSDaniel Schwierzeckconfig 64BIT 18602611cbbSDaniel Schwierzeck bool 18702611cbbSDaniel Schwierzeck 1889d638eeaSDaniel Schwierzeckconfig SWAP_IO_SPACE 1899d638eeaSDaniel Schwierzeck bool 1909d638eeaSDaniel Schwierzeck 191*dd7c7200SPaul Burtonconfig SYS_MIPS_CACHE_INIT_RAM_LOAD 192*dd7c7200SPaul Burton bool 193*dd7c7200SPaul Burton 1940e1dc345SDaniel Schwierzeckendif 1950e1dc345SDaniel Schwierzeck 196dd84058dSMasahiro Yamadaendmenu 197