1dd84058dSMasahiro Yamadamenu "MIPS architecture" 2dd84058dSMasahiro Yamada depends on MIPS 3dd84058dSMasahiro Yamada 4dd84058dSMasahiro Yamadaconfig SYS_ARCH 5dd84058dSMasahiro Yamada default "mips" 6dd84058dSMasahiro Yamada 7b9863b6dSDaniel Schwierzeckconfig SYS_CPU 8b9863b6dSDaniel Schwierzeck default "mips32" if CPU_MIPS32_R1 || CPU_MIPS32_R2 9b9863b6dSDaniel Schwierzeck default "mips64" if CPU_MIPS64_R1 || CPU_MIPS64_R2 10b9863b6dSDaniel Schwierzeck 11dd84058dSMasahiro Yamadachoice 12dd84058dSMasahiro Yamada prompt "Target select" 13a26cd049SJoe Hershberger optional 14dd84058dSMasahiro Yamada 15dd84058dSMasahiro Yamadaconfig TARGET_QEMU_MIPS 16dd84058dSMasahiro Yamada bool "Support qemu-mips" 170e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 180e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 1902611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 2002611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 21aa45f75eSDaniel Schwierzeck select SUPPORTS_CPU_MIPS64_R1 22aa45f75eSDaniel Schwierzeck select SUPPORTS_CPU_MIPS64_R2 23dd84058dSMasahiro Yamada 24dd84058dSMasahiro Yamadaconfig TARGET_MALTA 25dd84058dSMasahiro Yamada bool "Support malta" 26*05e34255SPaul Burton select DYNAMIC_IO_PORT_BASE 270e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 280e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 2902611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 3002611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 319d638eeaSDaniel Schwierzeck select SWAP_IO_SPACE 32f53830e7SDaniel Schwierzeck select MIPS_L1_CACHE_SHIFT_6 33dd84058dSMasahiro Yamada 34dd84058dSMasahiro Yamadaconfig TARGET_VCT 35dd84058dSMasahiro Yamada bool "Support vct" 360e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 3702611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 3802611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 39dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 40dd84058dSMasahiro Yamada 41dd84058dSMasahiro Yamadaconfig TARGET_DBAU1X00 42dd84058dSMasahiro Yamada bool "Support dbau1x00" 430e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 440e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 4502611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 4602611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 47dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 480315a289SDaniel Schwierzeck select MIPS_TUNE_4KC 49dd84058dSMasahiro Yamada 50dd84058dSMasahiro Yamadaconfig TARGET_PB1X00 51dd84058dSMasahiro Yamada bool "Support pb1x00" 520e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 5302611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 5402611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 55dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 560315a289SDaniel Schwierzeck select MIPS_TUNE_4KC 57dd84058dSMasahiro Yamada 58dd84058dSMasahiro Yamadaendchoice 59dd84058dSMasahiro Yamada 60dd84058dSMasahiro Yamadasource "board/dbau1x00/Kconfig" 61dd84058dSMasahiro Yamadasource "board/imgtec/malta/Kconfig" 62dd84058dSMasahiro Yamadasource "board/micronas/vct/Kconfig" 63dd84058dSMasahiro Yamadasource "board/pb1x00/Kconfig" 64dd84058dSMasahiro Yamadasource "board/qemu-mips/Kconfig" 65dd84058dSMasahiro Yamada 660e1dc345SDaniel Schwierzeckif MIPS 670e1dc345SDaniel Schwierzeck 680e1dc345SDaniel Schwierzeckchoice 690e1dc345SDaniel Schwierzeck prompt "Endianness selection" 700e1dc345SDaniel Schwierzeck help 710e1dc345SDaniel Schwierzeck Some MIPS boards can be configured for either little or big endian 720e1dc345SDaniel Schwierzeck byte order. These modes require different U-Boot images. In general there 730e1dc345SDaniel Schwierzeck is one preferred byteorder for a particular system but some systems are 740e1dc345SDaniel Schwierzeck just as commonly used in the one or the other endianness. 750e1dc345SDaniel Schwierzeck 760e1dc345SDaniel Schwierzeckconfig SYS_BIG_ENDIAN 770e1dc345SDaniel Schwierzeck bool "Big endian" 780e1dc345SDaniel Schwierzeck depends on SUPPORTS_BIG_ENDIAN 790e1dc345SDaniel Schwierzeck 800e1dc345SDaniel Schwierzeckconfig SYS_LITTLE_ENDIAN 810e1dc345SDaniel Schwierzeck bool "Little endian" 820e1dc345SDaniel Schwierzeck depends on SUPPORTS_LITTLE_ENDIAN 830e1dc345SDaniel Schwierzeck 840e1dc345SDaniel Schwierzeckendchoice 850e1dc345SDaniel Schwierzeck 8602611cbbSDaniel Schwierzeckchoice 8702611cbbSDaniel Schwierzeck prompt "CPU selection" 8802611cbbSDaniel Schwierzeck default CPU_MIPS32_R2 8902611cbbSDaniel Schwierzeck 9002611cbbSDaniel Schwierzeckconfig CPU_MIPS32_R1 9102611cbbSDaniel Schwierzeck bool "MIPS32 Release 1" 9202611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS32_R1 9302611cbbSDaniel Schwierzeck select 32BIT 9402611cbbSDaniel Schwierzeck help 9502611cbbSDaniel Schwierzeck Choose this option to build an U-Boot for release 1 or later of the 9602611cbbSDaniel Schwierzeck MIPS32 architecture. 9702611cbbSDaniel Schwierzeck 9802611cbbSDaniel Schwierzeckconfig CPU_MIPS32_R2 9902611cbbSDaniel Schwierzeck bool "MIPS32 Release 2" 10002611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS32_R2 10102611cbbSDaniel Schwierzeck select 32BIT 10202611cbbSDaniel Schwierzeck help 10302611cbbSDaniel Schwierzeck Choose this option to build an U-Boot for release 2 or later of the 10402611cbbSDaniel Schwierzeck MIPS32 architecture. 10502611cbbSDaniel Schwierzeck 10602611cbbSDaniel Schwierzeckconfig CPU_MIPS64_R1 10702611cbbSDaniel Schwierzeck bool "MIPS64 Release 1" 10802611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS64_R1 10902611cbbSDaniel Schwierzeck select 64BIT 11002611cbbSDaniel Schwierzeck help 11102611cbbSDaniel Schwierzeck Choose this option to build a kernel for release 1 or later of the 11202611cbbSDaniel Schwierzeck MIPS64 architecture. 11302611cbbSDaniel Schwierzeck 11402611cbbSDaniel Schwierzeckconfig CPU_MIPS64_R2 11502611cbbSDaniel Schwierzeck bool "MIPS64 Release 2" 11602611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS64_R2 11702611cbbSDaniel Schwierzeck select 64BIT 11802611cbbSDaniel Schwierzeck help 11902611cbbSDaniel Schwierzeck Choose this option to build a kernel for release 2 or later of the 12002611cbbSDaniel Schwierzeck MIPS64 architecture. 12102611cbbSDaniel Schwierzeck 12202611cbbSDaniel Schwierzeckendchoice 12302611cbbSDaniel Schwierzeck 12425fc664fSDaniel Schwierzeckmenu "OS boot interface" 12525fc664fSDaniel Schwierzeck 12625fc664fSDaniel Schwierzeckconfig MIPS_BOOT_CMDLINE_LEGACY 12725fc664fSDaniel Schwierzeck bool "Hand over legacy command line to Linux kernel" 12825fc664fSDaniel Schwierzeck default y 12925fc664fSDaniel Schwierzeck help 13025fc664fSDaniel Schwierzeck Enable this option if you want U-Boot to hand over the Yamon-style 13125fc664fSDaniel Schwierzeck command line to the kernel. All bootargs will be prepared as argc/argv 13225fc664fSDaniel Schwierzeck compatible list. The argument count (argc) is stored in register $a0. 13325fc664fSDaniel Schwierzeck The address of the argument list (argv) is stored in register $a1. 13425fc664fSDaniel Schwierzeck 135ca65e585SDaniel Schwierzeckconfig MIPS_BOOT_ENV_LEGACY 136ca65e585SDaniel Schwierzeck bool "Hand over legacy environment to Linux kernel" 137ca65e585SDaniel Schwierzeck default y 138ca65e585SDaniel Schwierzeck help 139ca65e585SDaniel Schwierzeck Enable this option if you want U-Boot to hand over the Yamon-style 140ca65e585SDaniel Schwierzeck environment to the kernel. Information like memory size, initrd 141ca65e585SDaniel Schwierzeck address and size will be prepared as zero-terminated key/value list. 142ca65e585SDaniel Schwierzeck The address of the enviroment is stored in register $a2. 143ca65e585SDaniel Schwierzeck 1445002d8ccSDaniel Schwierzeckconfig MIPS_BOOT_FDT 14590b1c9faSDaniel Schwierzeck bool "Hand over a flattened device tree to Linux kernel" 1465002d8ccSDaniel Schwierzeck default n 1475002d8ccSDaniel Schwierzeck help 1485002d8ccSDaniel Schwierzeck Enable this option if you want U-Boot to hand over a flattened 14990b1c9faSDaniel Schwierzeck device tree to the kernel. According to UHI register $a0 will be set 15090b1c9faSDaniel Schwierzeck to -2 and the FDT address is stored in $a1. 1515002d8ccSDaniel Schwierzeck 15225fc664fSDaniel Schwierzeckendmenu 15325fc664fSDaniel Schwierzeck 1540e1dc345SDaniel Schwierzeckconfig SUPPORTS_BIG_ENDIAN 1550e1dc345SDaniel Schwierzeck bool 1560e1dc345SDaniel Schwierzeck 1570e1dc345SDaniel Schwierzeckconfig SUPPORTS_LITTLE_ENDIAN 1580e1dc345SDaniel Schwierzeck bool 1590e1dc345SDaniel Schwierzeck 16002611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS32_R1 16102611cbbSDaniel Schwierzeck bool 16202611cbbSDaniel Schwierzeck 16302611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS32_R2 16402611cbbSDaniel Schwierzeck bool 16502611cbbSDaniel Schwierzeck 16602611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS64_R1 16702611cbbSDaniel Schwierzeck bool 16802611cbbSDaniel Schwierzeck 16902611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS64_R2 17002611cbbSDaniel Schwierzeck bool 17102611cbbSDaniel Schwierzeck 172c57dafb5SDaniel Schwierzeckconfig CPU_MIPS32 173c57dafb5SDaniel Schwierzeck bool 174c57dafb5SDaniel Schwierzeck default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 175c57dafb5SDaniel Schwierzeck 176c57dafb5SDaniel Schwierzeckconfig CPU_MIPS64 177c57dafb5SDaniel Schwierzeck bool 178c57dafb5SDaniel Schwierzeck default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 179c57dafb5SDaniel Schwierzeck 1800315a289SDaniel Schwierzeckconfig MIPS_TUNE_4KC 1810315a289SDaniel Schwierzeck bool 1820315a289SDaniel Schwierzeck 1830315a289SDaniel Schwierzeckconfig MIPS_TUNE_14KC 1840315a289SDaniel Schwierzeck bool 1850315a289SDaniel Schwierzeck 1860315a289SDaniel Schwierzeckconfig MIPS_TUNE_24KC 1870315a289SDaniel Schwierzeck bool 1880315a289SDaniel Schwierzeck 18902611cbbSDaniel Schwierzeckconfig 32BIT 19002611cbbSDaniel Schwierzeck bool 19102611cbbSDaniel Schwierzeck 19202611cbbSDaniel Schwierzeckconfig 64BIT 19302611cbbSDaniel Schwierzeck bool 19402611cbbSDaniel Schwierzeck 1959d638eeaSDaniel Schwierzeckconfig SWAP_IO_SPACE 1969d638eeaSDaniel Schwierzeck bool 1979d638eeaSDaniel Schwierzeck 198dd7c7200SPaul Burtonconfig SYS_MIPS_CACHE_INIT_RAM_LOAD 199dd7c7200SPaul Burton bool 200dd7c7200SPaul Burton 201f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_4 202f53830e7SDaniel Schwierzeck bool 203f53830e7SDaniel Schwierzeck 204f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_5 205f53830e7SDaniel Schwierzeck bool 206f53830e7SDaniel Schwierzeck 207f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_6 208f53830e7SDaniel Schwierzeck bool 209f53830e7SDaniel Schwierzeck 210f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_7 211f53830e7SDaniel Schwierzeck bool 212f53830e7SDaniel Schwierzeck 213f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT 214f53830e7SDaniel Schwierzeck int 215f53830e7SDaniel Schwierzeck default "7" if MIPS_L1_CACHE_SHIFT_7 216f53830e7SDaniel Schwierzeck default "6" if MIPS_L1_CACHE_SHIFT_6 217f53830e7SDaniel Schwierzeck default "5" if MIPS_L1_CACHE_SHIFT_5 218f53830e7SDaniel Schwierzeck default "4" if MIPS_L1_CACHE_SHIFT_4 219f53830e7SDaniel Schwierzeck default "5" 220f53830e7SDaniel Schwierzeck 221*05e34255SPaul Burtonconfig DYNAMIC_IO_PORT_BASE 222*05e34255SPaul Burton bool 223*05e34255SPaul Burton 2240e1dc345SDaniel Schwierzeckendif 2250e1dc345SDaniel Schwierzeck 226dd84058dSMasahiro Yamadaendmenu 227