1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 200aa453eSMasahiro Yamada /* 300aa453eSMasahiro Yamada * Copyright (C) 2011-2014 Panasonic Corporation 400aa453eSMasahiro Yamada * Copyright (C) 2015-2017 Socionext Inc. 500aa453eSMasahiro Yamada */ 600aa453eSMasahiro Yamada 700aa453eSMasahiro Yamada #include <common.h> 800aa453eSMasahiro Yamada #include <spl.h> 900aa453eSMasahiro Yamada #include <linux/io.h> 1000aa453eSMasahiro Yamada 1100aa453eSMasahiro Yamada #include "../init.h" 1200aa453eSMasahiro Yamada #include "../sc-regs.h" 1300aa453eSMasahiro Yamada uniphier_ld4_early_clk_init(void)1400aa453eSMasahiro Yamadavoid uniphier_ld4_early_clk_init(void) 1500aa453eSMasahiro Yamada { 1600aa453eSMasahiro Yamada u32 tmp; 1700aa453eSMasahiro Yamada 1800aa453eSMasahiro Yamada /* deassert reset */ 1900aa453eSMasahiro Yamada if (spl_boot_device() != BOOT_DEVICE_NAND) { 2000aa453eSMasahiro Yamada tmp = readl(SC_RSTCTRL); 2100aa453eSMasahiro Yamada tmp &= ~SC_RSTCTRL_NRST_NAND; 2200aa453eSMasahiro Yamada writel(tmp, SC_RSTCTRL); 2300aa453eSMasahiro Yamada }; 2400aa453eSMasahiro Yamada 2500aa453eSMasahiro Yamada /* provide clocks */ 2600aa453eSMasahiro Yamada tmp = readl(SC_CLKCTRL); 2700aa453eSMasahiro Yamada tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; 2800aa453eSMasahiro Yamada writel(tmp, SC_CLKCTRL); 2900aa453eSMasahiro Yamada readl(SC_CLKCTRL); /* dummy read */ 3000aa453eSMasahiro Yamada } 31