109f455dcSMasahiro Yamadaif TEGRA 209f455dcSMasahiro Yamada 353b5bf3cSSimon Glassconfig SPL_GPIO_SUPPORT 453b5bf3cSSimon Glass default y 553b5bf3cSSimon Glass 677d2f7f5SSimon Glassconfig SPL_LIBCOMMON_SUPPORT 777d2f7f5SSimon Glass default y 877d2f7f5SSimon Glass 9cc4288efSSimon Glassconfig SPL_LIBGENERIC_SUPPORT 10cc4288efSSimon Glass default y 11cc4288efSSimon Glass 12e00f76ceSSimon Glassconfig SPL_SERIAL_SUPPORT 13e00f76ceSSimon Glass default y 14e00f76ceSSimon Glass 1549626ea8SStephen Warrenconfig TEGRA_IVC 1649626ea8SStephen Warren bool "Tegra IVC protocol" 1749626ea8SStephen Warren help 1849626ea8SStephen Warren IVC (Inter-VM Communication) protocol is a Tegra-specific IPC 1949626ea8SStephen Warren (Inter Processor Communication) framework. Within the context of 2049626ea8SStephen Warren U-Boot, it is typically used for communication between the main CPU 2149626ea8SStephen Warren and various auxiliary processors. 2249626ea8SStephen Warren 2315bcc62dSStephen Warrenconfig TEGRA_COMMON 2415bcc62dSStephen Warren bool "Tegra common options" 255ed063d1SMichal Simek select BINMAN 265ed063d1SMichal Simek select BOARD_EARLY_INIT_F 27140a9eafSStephen Warren select CLK 2856079eccSTom Warren select DM 2996350f72SSimon Glass select DM_ETH 3056079eccSTom Warren select DM_GPIO 3115bcc62dSStephen Warren select DM_I2C 32f77f5e9bSSimon Glass select DM_KEYBOARD 336a474db4STom Warren select DM_MMC 3491c08afeSSimon Glass select DM_PWM 35140a9eafSStephen Warren select DM_RESET 3615bcc62dSStephen Warren select DM_SERIAL 3715bcc62dSStephen Warren select DM_SPI 3815bcc62dSStephen Warren select DM_SPI_FLASH 39140a9eafSStephen Warren select MISC 4015bcc62dSStephen Warren select OF_CONTROL 415ed063d1SMichal Simek select SPI 42d6ef8a61SSimon Glass select VIDCONSOLE_AS_LCD if DM_VIDEO 43*08a00cbaSMichal Simek imply CMD_DM 44221a949eSDaniel Thompson imply CRC32_VERIFY 4515bcc62dSStephen Warren 46140a9eafSStephen Warrenconfig TEGRA_NO_BPMP 47140a9eafSStephen Warren bool "Tegra common options for SoCs without BPMP" 48140a9eafSStephen Warren select TEGRA_CAR 49140a9eafSStephen Warren select TEGRA_CAR_CLOCK 50140a9eafSStephen Warren select TEGRA_CAR_RESET 51140a9eafSStephen Warren 5215bcc62dSStephen Warrenconfig TEGRA_ARMV7_COMMON 5315bcc62dSStephen Warren bool "Tegra 32-bit common options" 54acf15001SLokesh Vutla select CPU_V7A 5515bcc62dSStephen Warren select SPL 560680f1b1SLey Foon Tan select SPL_BOARD_INIT if SPL 5715bcc62dSStephen Warren select SUPPORT_SPL 5815bcc62dSStephen Warren select TEGRA_COMMON 59601800beSStephen Warren select TEGRA_GPIO 60140a9eafSStephen Warren select TEGRA_NO_BPMP 6115bcc62dSStephen Warren 6215bcc62dSStephen Warrenconfig TEGRA_ARMV8_COMMON 6315bcc62dSStephen Warren bool "Tegra 64-bit common options" 6415bcc62dSStephen Warren select ARM64 65ddecaaf3SStephen Warren select LINUX_KERNEL_IMAGE_HEADER 6615bcc62dSStephen Warren select TEGRA_COMMON 6756079eccSTom Warren 68ddecaaf3SStephen Warrenif TEGRA_ARMV8_COMMON 69ddecaaf3SStephen Warrenconfig LNX_KRNL_IMG_TEXT_OFFSET_BASE 70ddecaaf3SStephen Warren default 0x80000000 71ddecaaf3SStephen Warrenendif 72ddecaaf3SStephen Warren 7309f455dcSMasahiro Yamadachoice 7409f455dcSMasahiro Yamada prompt "Tegra SoC select" 75a26cd049SJoe Hershberger optional 7609f455dcSMasahiro Yamada 7709f455dcSMasahiro Yamadaconfig TEGRA20 7809f455dcSMasahiro Yamada bool "Tegra20 family" 798dda2e2fSTom Rini select ARM_ERRATA_716044 808dda2e2fSTom Rini select ARM_ERRATA_742230 818dda2e2fSTom Rini select ARM_ERRATA_751472 8256079eccSTom Warren select TEGRA_ARMV7_COMMON 8309f455dcSMasahiro Yamada 8409f455dcSMasahiro Yamadaconfig TEGRA30 8509f455dcSMasahiro Yamada bool "Tegra30 family" 868dda2e2fSTom Rini select ARM_ERRATA_743622 878dda2e2fSTom Rini select ARM_ERRATA_751472 8856079eccSTom Warren select TEGRA_ARMV7_COMMON 8909f455dcSMasahiro Yamada 9009f455dcSMasahiro Yamadaconfig TEGRA114 9109f455dcSMasahiro Yamada bool "Tegra114 family" 9256079eccSTom Warren select TEGRA_ARMV7_COMMON 9309f455dcSMasahiro Yamada 9409f455dcSMasahiro Yamadaconfig TEGRA124 9509f455dcSMasahiro Yamada bool "Tegra124 family" 9656079eccSTom Warren select TEGRA_ARMV7_COMMON 9766de3eeeSSimon Glass imply REGMAP 9866de3eeeSSimon Glass imply SYSCON 9909f455dcSMasahiro Yamada 1007aaa5a60STom Warrenconfig TEGRA210 1017aaa5a60STom Warren bool "Tegra210 family" 10215bcc62dSStephen Warren select TEGRA_ARMV8_COMMON 1035ed063d1SMichal Simek select TEGRA_GPIO 104140a9eafSStephen Warren select TEGRA_NO_BPMP 1057aaa5a60STom Warren 106c7ba99c8SStephen Warrenconfig TEGRA186 107c7ba99c8SStephen Warren bool "Tegra186 family" 1080f67e239SStephen Warren select DM_MAILBOX 10973dd5c4cSStephen Warren select TEGRA186_BPMP 110d9fd7008SStephen Warren select TEGRA186_CLOCK 111c7ba99c8SStephen Warren select TEGRA186_GPIO 1124dd99d14SStephen Warren select TEGRA186_RESET 113c7ba99c8SStephen Warren select TEGRA_ARMV8_COMMON 1140f67e239SStephen Warren select TEGRA_HSP 11549626ea8SStephen Warren select TEGRA_IVC 116c7ba99c8SStephen Warren 11709f455dcSMasahiro Yamadaendchoice 11809f455dcSMasahiro Yamada 119dd8204deSStephen Warrenconfig TEGRA_DISCONNECT_UDC_ON_BOOT 120dd8204deSStephen Warren bool "Disconnect USB device mode controller on boot" 121dd8204deSStephen Warren default y 122dd8204deSStephen Warren help 123dd8204deSStephen Warren When loading U-Boot into RAM over USB protocols using tools such as 124dd8204deSStephen Warren tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device 125dd8204deSStephen Warren mode controller is initialized and enumerated by the host PC running 126dd8204deSStephen Warren the tool. Unfortunately, these tools do not shut down the USB 127dd8204deSStephen Warren controller before executing the downloaded code, and so the host PC 128dd8204deSStephen Warren does not "de-enumerate" the USB device. This option shuts down the 129dd8204deSStephen Warren USB controller when U-Boot boots to avoid leaving a stale USB device 130dd8204deSStephen Warren present. 131dd8204deSStephen Warren 13209f455dcSMasahiro Yamadaconfig SYS_MALLOC_F_LEN 13309f455dcSMasahiro Yamada default 0x1800 13409f455dcSMasahiro Yamada 13509f455dcSMasahiro Yamadasource "arch/arm/mach-tegra/tegra20/Kconfig" 13609f455dcSMasahiro Yamadasource "arch/arm/mach-tegra/tegra30/Kconfig" 13709f455dcSMasahiro Yamadasource "arch/arm/mach-tegra/tegra114/Kconfig" 13809f455dcSMasahiro Yamadasource "arch/arm/mach-tegra/tegra124/Kconfig" 1397aaa5a60STom Warrensource "arch/arm/mach-tegra/tegra210/Kconfig" 140c7ba99c8SStephen Warrensource "arch/arm/mach-tegra/tegra186/Kconfig" 14109f455dcSMasahiro Yamada 14242e6f852SSimon Glassconfig CMD_ENTERRCM 14342e6f852SSimon Glass bool "Enable 'enterrcm' command" 14442e6f852SSimon Glass default y 14542e6f852SSimon Glass help 14642e6f852SSimon Glass Tegra's boot ROM supports a mode whereby code may be downloaded and 14742e6f852SSimon Glass flash-programmed over a USB connection. On dev boards, this is 14842e6f852SSimon Glass typically entered by holding down a "force recovery" button and 14942e6f852SSimon Glass resetting the CPU. However, not all boards have such a button (one 15042e6f852SSimon Glass example is the Compulab Trimslice), so a method to enter RCM from 15142e6f852SSimon Glass software is useful. 15242e6f852SSimon Glass 15342e6f852SSimon Glass Even on boards other than Trimslice, controlling this over a UART 15442e6f852SSimon Glass may be useful, e.g. to allow simple remote control without the need 15542e6f852SSimon Glass for mechanical button actuators, or hooking up relays/... to the 15642e6f852SSimon Glass button. 15742e6f852SSimon Glass 15809f455dcSMasahiro Yamadaendif 159