183d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2871c24bcSDinh Nguyen /* 3871c24bcSDinh Nguyen * Copyright (C) 2012 Altera Corporation <www.altera.com> 4871c24bcSDinh Nguyen */ 5871c24bcSDinh Nguyen 6871c24bcSDinh Nguyen #ifndef _SOCFPGA_BASE_ADDRS_H_ 7871c24bcSDinh Nguyen #define _SOCFPGA_BASE_ADDRS_H_ 8871c24bcSDinh Nguyen 9*30bade20SSimon Goldschmidt #define SOCFPGA_FPGA_SLAVES_ADDRESS 0xc0000000 10871c24bcSDinh Nguyen #define SOCFPGA_STM_ADDRESS 0xfc000000 11871c24bcSDinh Nguyen #define SOCFPGA_DAP_ADDRESS 0xff000000 12871c24bcSDinh Nguyen #define SOCFPGA_EMAC0_ADDRESS 0xff700000 13871c24bcSDinh Nguyen #define SOCFPGA_EMAC1_ADDRESS 0xff702000 14871c24bcSDinh Nguyen #define SOCFPGA_SDMMC_ADDRESS 0xff704000 15871c24bcSDinh Nguyen #define SOCFPGA_QSPI_ADDRESS 0xff705000 16871c24bcSDinh Nguyen #define SOCFPGA_GPIO0_ADDRESS 0xff708000 17871c24bcSDinh Nguyen #define SOCFPGA_GPIO1_ADDRESS 0xff709000 18871c24bcSDinh Nguyen #define SOCFPGA_GPIO2_ADDRESS 0xff70a000 19871c24bcSDinh Nguyen #define SOCFPGA_L3REGS_ADDRESS 0xff800000 20871c24bcSDinh Nguyen #define SOCFPGA_USB0_ADDRESS 0xffb00000 21871c24bcSDinh Nguyen #define SOCFPGA_USB1_ADDRESS 0xffb40000 22871c24bcSDinh Nguyen #define SOCFPGA_CAN0_ADDRESS 0xffc00000 23871c24bcSDinh Nguyen #define SOCFPGA_CAN1_ADDRESS 0xffc01000 24871c24bcSDinh Nguyen #define SOCFPGA_UART0_ADDRESS 0xffc02000 25871c24bcSDinh Nguyen #define SOCFPGA_UART1_ADDRESS 0xffc03000 26871c24bcSDinh Nguyen #define SOCFPGA_I2C0_ADDRESS 0xffc04000 27871c24bcSDinh Nguyen #define SOCFPGA_I2C1_ADDRESS 0xffc05000 28871c24bcSDinh Nguyen #define SOCFPGA_I2C2_ADDRESS 0xffc06000 29871c24bcSDinh Nguyen #define SOCFPGA_I2C3_ADDRESS 0xffc07000 30871c24bcSDinh Nguyen #define SOCFPGA_SDR_ADDRESS 0xffc20000 31871c24bcSDinh Nguyen #define SOCFPGA_L4WD0_ADDRESS 0xffd02000 32871c24bcSDinh Nguyen #define SOCFPGA_L4WD1_ADDRESS 0xffd03000 33871c24bcSDinh Nguyen #define SOCFPGA_CLKMGR_ADDRESS 0xffd04000 34871c24bcSDinh Nguyen #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000 35871c24bcSDinh Nguyen #define SOCFPGA_SYSMGR_ADDRESS 0xffd08000 36871c24bcSDinh Nguyen #define SOCFPGA_SPIS0_ADDRESS 0xffe02000 37871c24bcSDinh Nguyen #define SOCFPGA_SPIS1_ADDRESS 0xffe03000 38871c24bcSDinh Nguyen #define SOCFPGA_SPIM0_ADDRESS 0xfff00000 39871c24bcSDinh Nguyen #define SOCFPGA_SPIM1_ADDRESS 0xfff01000 40871c24bcSDinh Nguyen #define SOCFPGA_SCANMGR_ADDRESS 0xfff02000 41871c24bcSDinh Nguyen #define SOCFPGA_ROM_ADDRESS 0xfffd0000 42871c24bcSDinh Nguyen #define SOCFPGA_MPUSCU_ADDRESS 0xfffec000 43871c24bcSDinh Nguyen #define SOCFPGA_MPUL2_ADDRESS 0xfffef000 44871c24bcSDinh Nguyen #define SOCFPGA_OCRAM_ADDRESS 0xffff0000 45871c24bcSDinh Nguyen #define SOCFPGA_LWFPGASLAVES_ADDRESS 0xff200000 46871c24bcSDinh Nguyen #define SOCFPGA_LWHPS2FPGAREGS_ADDRESS 0xff400000 47871c24bcSDinh Nguyen #define SOCFPGA_HPS2FPGAREGS_ADDRESS 0xff500000 48871c24bcSDinh Nguyen #define SOCFPGA_FPGA2HPSREGS_ADDRESS 0xff600000 49871c24bcSDinh Nguyen #define SOCFPGA_FPGAMGRREGS_ADDRESS 0xff706000 50871c24bcSDinh Nguyen #define SOCFPGA_ACPIDMAP_ADDRESS 0xff707000 51871c24bcSDinh Nguyen #define SOCFPGA_NANDDATA_ADDRESS 0xff900000 52871c24bcSDinh Nguyen #define SOCFPGA_QSPIDATA_ADDRESS 0xffa00000 53871c24bcSDinh Nguyen #define SOCFPGA_NANDREGS_ADDRESS 0xffb80000 54871c24bcSDinh Nguyen #define SOCFPGA_FPGAMGRDATA_ADDRESS 0xffb90000 55871c24bcSDinh Nguyen #define SOCFPGA_SPTIMER0_ADDRESS 0xffc08000 56871c24bcSDinh Nguyen #define SOCFPGA_SPTIMER1_ADDRESS 0xffc09000 57871c24bcSDinh Nguyen #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000 58871c24bcSDinh Nguyen #define SOCFPGA_OSC1TIMER1_ADDRESS 0xffd01000 59871c24bcSDinh Nguyen #define SOCFPGA_DMANONSECURE_ADDRESS 0xffe00000 60871c24bcSDinh Nguyen #define SOCFPGA_DMASECURE_ADDRESS 0xffe01000 61871c24bcSDinh Nguyen 62871c24bcSDinh Nguyen #endif /* _SOCFPGA_BASE_ADDRS_H_ */ 63