183d290c5STom Rini# SPDX-License-Identifier: GPL-2.0+ 205a21721SMasahiro Yamada# 305a21721SMasahiro Yamada# (C) Copyright 2000-2003 405a21721SMasahiro Yamada# Wolfgang Denk, DENX Software Engineering, wd@denx.de. 505a21721SMasahiro Yamada# 6d89e979cSLey Foon Tan# Copyright (C) 2012-2017 Altera Corporation <www.altera.com> 705a21721SMasahiro Yamada 8d89e979cSLey Foon Tanobj-y += board.o 9d89e979cSLey Foon Tanobj-y += clock_manager.o 10d89e979cSLey Foon Tanobj-y += misc.o 11d89e979cSLey Foon Tanobj-y += reset_manager.o 12e5ad7d98SDinh Nguyen 13d89e979cSLey Foon Tanifdef CONFIG_TARGET_SOCFPGA_GEN5 14d89e979cSLey Foon Tanobj-y += clock_manager_gen5.o 15d89e979cSLey Foon Tanobj-y += misc_gen5.o 16d89e979cSLey Foon Tanobj-y += reset_manager_gen5.o 17d89e979cSLey Foon Tanobj-y += scan_manager.o 18d89e979cSLey Foon Tanobj-y += system_manager_gen5.o 19*73aede59SLey Foon Tanobj-y += timer.o 20d89e979cSLey Foon Tanobj-y += wrap_pll_config.o 216867e19aSTien Fong Cheeobj-y += fpga_manager.o 22d89e979cSLey Foon Tanendif 23827e6a7eSLey Foon Tan 24d89e979cSLey Foon Tanifdef CONFIG_TARGET_SOCFPGA_ARRIA10 25d89e979cSLey Foon Tanobj-y += clock_manager_arria10.o 26d89e979cSLey Foon Tanobj-y += misc_arria10.o 27d89e979cSLey Foon Tanobj-y += pinmux_arria10.o 28d89e979cSLey Foon Tanobj-y += reset_manager_arria10.o 29d89e979cSLey Foon Tanendif 30ca62d2e1SMarek Vasut 31508791a0SLey Foon Tanifdef CONFIG_TARGET_SOCFPGA_STRATIX10 32508791a0SLey Foon Tanobj-y += clock_manager_s10.o 33a280e9dbSLey Foon Tanobj-y += mailbox_s10.o 34d559130eSLey Foon Tanobj-y += misc_s10.o 35914a84e6SLey Foon Tanobj-y += mmu-arm64_s10.o 363607a808SLey Foon Tanobj-y += reset_manager_s10.o 3773175d04SLey Foon Tanobj-y += system_manager_s10.o 38*73aede59SLey Foon Tanobj-y += timer_s10.o 3973175d04SLey Foon Tanobj-y += wrap_pinmux_config_s10.o 40508791a0SLey Foon Tanobj-y += wrap_pll_config_s10.o 41508791a0SLey Foon Tanendif 424765ddb0SLey Foon Tan 43d89e979cSLey Foon Tanifdef CONFIG_SPL_BUILD 44d89e979cSLey Foon Tanifdef CONFIG_TARGET_SOCFPGA_GEN5 45c859f2a7SLey Foon Tanobj-y += spl_gen5.o 46d89e979cSLey Foon Tanobj-y += freeze_controller.o 47d89e979cSLey Foon Tanobj-y += wrap_iocsr_config.o 48d89e979cSLey Foon Tanobj-y += wrap_pinmux_config.o 49d89e979cSLey Foon Tanobj-y += wrap_sdram_config.o 50d89e979cSLey Foon Tanendif 51c859f2a7SLey Foon Tanifdef CONFIG_TARGET_SOCFPGA_ARRIA10 52c859f2a7SLey Foon Tanobj-y += spl_a10.o 53c859f2a7SLey Foon Tanendif 544765ddb0SLey Foon Tanifdef CONFIG_TARGET_SOCFPGA_STRATIX10 554765ddb0SLey Foon Tanobj-y += spl_s10.o 564765ddb0SLey Foon Tanendif 57d89e979cSLey Foon Tanendif 58d89e979cSLey Foon Tan 59d89e979cSLey Foon Tanifdef CONFIG_TARGET_SOCFPGA_GEN5 60ca62d2e1SMarek Vasut# QTS-generated config file wrappers 61ca62d2e1SMarek VasutCFLAGS_wrap_iocsr_config.o += -I$(srctree)/board/$(BOARDDIR) 62ca62d2e1SMarek VasutCFLAGS_wrap_pinmux_config.o += -I$(srctree)/board/$(BOARDDIR) 63ca62d2e1SMarek VasutCFLAGS_wrap_pll_config.o += -I$(srctree)/board/$(BOARDDIR) 64ca62d2e1SMarek VasutCFLAGS_wrap_sdram_config.o += -I$(srctree)/board/$(BOARDDIR) 65d89e979cSLey Foon Tanendif 66