1*361e13f1SWeijie Gao /* SPDX-License-Identifier: GPL-2.0 */ 2*361e13f1SWeijie Gao /* 3*361e13f1SWeijie Gao * Copyright (C) 2018 MediaTek Inc. 4*361e13f1SWeijie Gao */ 5*361e13f1SWeijie Gao 6*361e13f1SWeijie Gao #ifndef __PRELOADER_H_ 7*361e13f1SWeijie Gao #define __PRELOADER_H_ 8*361e13f1SWeijie Gao 9*361e13f1SWeijie Gao enum forbidden_mode { 10*361e13f1SWeijie Gao F_FACTORY_MODE = 0x0001 11*361e13f1SWeijie Gao }; 12*361e13f1SWeijie Gao 13*361e13f1SWeijie Gao union lk_hdr { 14*361e13f1SWeijie Gao struct { 15*361e13f1SWeijie Gao u32 magic; 16*361e13f1SWeijie Gao u32 size; 17*361e13f1SWeijie Gao char name[32]; 18*361e13f1SWeijie Gao u32 loadaddr; 19*361e13f1SWeijie Gao }; 20*361e13f1SWeijie Gao 21*361e13f1SWeijie Gao u8 data[512]; 22*361e13f1SWeijie Gao }; 23*361e13f1SWeijie Gao 24*361e13f1SWeijie Gao struct sec_limit { 25*361e13f1SWeijie Gao unsigned int magic_num; 26*361e13f1SWeijie Gao enum forbidden_mode forbid_mode; 27*361e13f1SWeijie Gao }; 28*361e13f1SWeijie Gao 29*361e13f1SWeijie Gao enum bootmode { 30*361e13f1SWeijie Gao NORMAL_BOOT = 0, 31*361e13f1SWeijie Gao META_BOOT = 1, 32*361e13f1SWeijie Gao RECOVERY_BOOT = 2, 33*361e13f1SWeijie Gao SW_REBOOT = 3, 34*361e13f1SWeijie Gao FACTORY_BOOT = 4, 35*361e13f1SWeijie Gao ADVMETA_BOOT = 5, 36*361e13f1SWeijie Gao ATE_FACTORY_BOOT = 6, 37*361e13f1SWeijie Gao ALARM_BOOT = 7, 38*361e13f1SWeijie Gao 39*361e13f1SWeijie Gao KERNEL_POWER_OFF_CHARGING_BOOT = 8, 40*361e13f1SWeijie Gao LOW_POWER_OFF_CHARGING_BOOT = 9, 41*361e13f1SWeijie Gao 42*361e13f1SWeijie Gao FAST_BOOT = 99, 43*361e13f1SWeijie Gao DOWNLOAD_BOOT = 100, 44*361e13f1SWeijie Gao UNKNOWN_BOOT 45*361e13f1SWeijie Gao }; 46*361e13f1SWeijie Gao 47*361e13f1SWeijie Gao enum boot_reason { 48*361e13f1SWeijie Gao BR_POWER_KEY = 0, 49*361e13f1SWeijie Gao BR_USB, 50*361e13f1SWeijie Gao BR_RTC, 51*361e13f1SWeijie Gao BR_WDT, 52*361e13f1SWeijie Gao BR_WDT_BY_PASS_PWK, 53*361e13f1SWeijie Gao BR_TOOL_BY_PASS_PWK, 54*361e13f1SWeijie Gao BR_2SEC_REBOOT, 55*361e13f1SWeijie Gao BR_UNKNOWN 56*361e13f1SWeijie Gao }; 57*361e13f1SWeijie Gao 58*361e13f1SWeijie Gao enum meta_com_type { 59*361e13f1SWeijie Gao META_UNKNOWN_COM = 0, 60*361e13f1SWeijie Gao META_UART_COM, 61*361e13f1SWeijie Gao META_USB_COM 62*361e13f1SWeijie Gao }; 63*361e13f1SWeijie Gao 64*361e13f1SWeijie Gao struct da_info_t { 65*361e13f1SWeijie Gao u32 addr; 66*361e13f1SWeijie Gao u32 arg1; 67*361e13f1SWeijie Gao u32 arg2; 68*361e13f1SWeijie Gao u32 len; 69*361e13f1SWeijie Gao u32 sig_len; 70*361e13f1SWeijie Gao }; 71*361e13f1SWeijie Gao 72*361e13f1SWeijie Gao struct boot_argument { 73*361e13f1SWeijie Gao u32 magic; 74*361e13f1SWeijie Gao enum bootmode boot_mode; 75*361e13f1SWeijie Gao u32 e_flag; 76*361e13f1SWeijie Gao u32 log_port; 77*361e13f1SWeijie Gao u32 log_baudrate; 78*361e13f1SWeijie Gao u8 log_enable; 79*361e13f1SWeijie Gao u8 part_num; 80*361e13f1SWeijie Gao u8 reserved[2]; 81*361e13f1SWeijie Gao u32 dram_rank_num; 82*361e13f1SWeijie Gao u32 dram_rank_size[4]; 83*361e13f1SWeijie Gao u32 boot_reason; 84*361e13f1SWeijie Gao enum meta_com_type meta_com_type; 85*361e13f1SWeijie Gao u32 meta_com_id; 86*361e13f1SWeijie Gao u32 boot_time; 87*361e13f1SWeijie Gao struct da_info_t da_info; 88*361e13f1SWeijie Gao struct sec_limit sec_limit; 89*361e13f1SWeijie Gao union lk_hdr *part_info; 90*361e13f1SWeijie Gao u8 md_type[4]; 91*361e13f1SWeijie Gao u32 ddr_reserve_enable; 92*361e13f1SWeijie Gao u32 ddr_reserve_success; 93*361e13f1SWeijie Gao u32 chip_ver; 94*361e13f1SWeijie Gao char pl_version[8]; 95*361e13f1SWeijie Gao }; 96*361e13f1SWeijie Gao 97*361e13f1SWeijie Gao #define BOOT_ARGUMENT_MAGIC 0x504c504c 98*361e13f1SWeijie Gao 99*361e13f1SWeijie Gao #endif /* __PRELOADER_H_ */ 100