1*23f7b1a7SLokesh Vutla // SPDX-License-Identifier: GPL-2.0+
2*23f7b1a7SLokesh Vutla /*
3*23f7b1a7SLokesh Vutla * K3: R5 MPU region definitions
4*23f7b1a7SLokesh Vutla *
5*23f7b1a7SLokesh Vutla * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
6*23f7b1a7SLokesh Vutla * Lokesh Vutla <lokeshvutla@ti.com>
7*23f7b1a7SLokesh Vutla */
8*23f7b1a7SLokesh Vutla
9*23f7b1a7SLokesh Vutla #include <common.h>
10*23f7b1a7SLokesh Vutla #include <asm/io.h>
11*23f7b1a7SLokesh Vutla #include <linux/kernel.h>
12*23f7b1a7SLokesh Vutla #include "common.h"
13*23f7b1a7SLokesh Vutla
14*23f7b1a7SLokesh Vutla struct mpu_region_config k3_mpu_regions[16] = {
15*23f7b1a7SLokesh Vutla /*
16*23f7b1a7SLokesh Vutla * Make all 4GB as Device Memory and not executable. We are overriding
17*23f7b1a7SLokesh Vutla * it with next region for any requirement.
18*23f7b1a7SLokesh Vutla */
19*23f7b1a7SLokesh Vutla {0x00000000, REGION_0, XN_EN, PRIV_RW_USR_RW, SHARED_WRITE_BUFFERED,
20*23f7b1a7SLokesh Vutla REGION_4GB},
21*23f7b1a7SLokesh Vutla
22*23f7b1a7SLokesh Vutla /* SPL code area marking it as WB and Write allocate. */
23*23f7b1a7SLokesh Vutla {CONFIG_SPL_TEXT_BASE, REGION_1, XN_DIS, PRIV_RW_USR_RW,
24*23f7b1a7SLokesh Vutla O_I_WB_RD_WR_ALLOC, REGION_8MB},
25*23f7b1a7SLokesh Vutla
26*23f7b1a7SLokesh Vutla /* U-Boot's code area marking it as WB and Write allocate */
27*23f7b1a7SLokesh Vutla {CONFIG_SYS_SDRAM_BASE, REGION_2, XN_DIS, PRIV_RW_USR_RW,
28*23f7b1a7SLokesh Vutla O_I_WB_RD_WR_ALLOC, REGION_2GB},
29*23f7b1a7SLokesh Vutla {0x0, 3, 0x0, 0x0, 0x0, 0x0},
30*23f7b1a7SLokesh Vutla {0x0, 4, 0x0, 0x0, 0x0, 0x0},
31*23f7b1a7SLokesh Vutla {0x0, 5, 0x0, 0x0, 0x0, 0x0},
32*23f7b1a7SLokesh Vutla {0x0, 6, 0x0, 0x0, 0x0, 0x0},
33*23f7b1a7SLokesh Vutla {0x0, 7, 0x0, 0x0, 0x0, 0x0},
34*23f7b1a7SLokesh Vutla {0x0, 8, 0x0, 0x0, 0x0, 0x0},
35*23f7b1a7SLokesh Vutla {0x0, 9, 0x0, 0x0, 0x0, 0x0},
36*23f7b1a7SLokesh Vutla {0x0, 10, 0x0, 0x0, 0x0, 0x0},
37*23f7b1a7SLokesh Vutla {0x0, 11, 0x0, 0x0, 0x0, 0x0},
38*23f7b1a7SLokesh Vutla {0x0, 12, 0x0, 0x0, 0x0, 0x0},
39*23f7b1a7SLokesh Vutla {0x0, 13, 0x0, 0x0, 0x0, 0x0},
40*23f7b1a7SLokesh Vutla {0x0, 14, 0x0, 0x0, 0x0, 0x0},
41*23f7b1a7SLokesh Vutla {0x0, 15, 0x0, 0x0, 0x0, 0x0},
42*23f7b1a7SLokesh Vutla };
43*23f7b1a7SLokesh Vutla
setup_k3_mpu_regions(void)44*23f7b1a7SLokesh Vutla void setup_k3_mpu_regions(void)
45*23f7b1a7SLokesh Vutla {
46*23f7b1a7SLokesh Vutla setup_mpu_regions(k3_mpu_regions, ARRAY_SIZE(k3_mpu_regions));
47*23f7b1a7SLokesh Vutla }
48