1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 23d357619SMasahiro Yamada /* 33d357619SMasahiro Yamada * Copyright (C) 2011 43d357619SMasahiro Yamada * Heiko Schocher, DENX Software Engineering, hs@denx.de. 53d357619SMasahiro Yamada */ 63d357619SMasahiro Yamada #ifndef _DV_SYSCFG_DEFS_H_ 73d357619SMasahiro Yamada #define _DV_SYSCFG_DEFS_H_ 83d357619SMasahiro Yamada 93d357619SMasahiro Yamada #ifndef CONFIG_SOC_DA8XX 103d357619SMasahiro Yamada /* System Control Module register structure for DM365 */ 113d357619SMasahiro Yamada struct dv_sys_module_regs { 123d357619SMasahiro Yamada unsigned int pinmux[5]; /* 0x00 */ 133d357619SMasahiro Yamada unsigned int bootcfg; /* 0x14 */ 143d357619SMasahiro Yamada unsigned int arm_intmux; /* 0x18 */ 153d357619SMasahiro Yamada unsigned int edma_evtmux; /* 0x1C */ 163d357619SMasahiro Yamada unsigned int ddr_slew; /* 0x20 */ 173d357619SMasahiro Yamada unsigned int clkout; /* 0x24 */ 183d357619SMasahiro Yamada unsigned int device_id; /* 0x28 */ 193d357619SMasahiro Yamada unsigned int vdac_config; /* 0x2C */ 203d357619SMasahiro Yamada unsigned int timer64_ctl; /* 0x30 */ 213d357619SMasahiro Yamada unsigned int usbbphy_ctl; /* 0x34 */ 223d357619SMasahiro Yamada unsigned int misc; /* 0x38 */ 233d357619SMasahiro Yamada unsigned int mstpri[2]; /* 0x3C */ 243d357619SMasahiro Yamada unsigned int vpss_clkctl; /* 0x44 */ 253d357619SMasahiro Yamada unsigned int peri_clkctl; /* 0x48 */ 263d357619SMasahiro Yamada unsigned int deepsleep; /* 0x4C */ 273d357619SMasahiro Yamada unsigned int dft_enable; /* 0x50 */ 283d357619SMasahiro Yamada unsigned int debounce[8]; /* 0x54 */ 293d357619SMasahiro Yamada unsigned int vtpiocr; /* 0x74 */ 303d357619SMasahiro Yamada unsigned int pupdctl0; /* 0x78 */ 313d357619SMasahiro Yamada unsigned int pupdctl1; /* 0x7C */ 323d357619SMasahiro Yamada unsigned int hdimcopbt; /* 0x80 */ 333d357619SMasahiro Yamada unsigned int pll0_config; /* 0x84 */ 343d357619SMasahiro Yamada unsigned int pll1_config; /* 0x88 */ 353d357619SMasahiro Yamada }; 363d357619SMasahiro Yamada 373d357619SMasahiro Yamada #define VPTIO_RDY (1 << 15) 383d357619SMasahiro Yamada #define VPTIO_IOPWRDN (1 << 14) 393d357619SMasahiro Yamada #define VPTIO_CLRZ (1 << 13) 403d357619SMasahiro Yamada #define VPTIO_LOCK (1 << 7) 413d357619SMasahiro Yamada #define VPTIO_PWRDN (1 << 6) 423d357619SMasahiro Yamada 433d357619SMasahiro Yamada #define VPSS_CLK_CTL_VPSS_CLKMD (1 << 7) 443d357619SMasahiro Yamada 453d357619SMasahiro Yamada #define dv_sys_module_regs \ 463d357619SMasahiro Yamada ((struct dv_sys_module_regs *)DAVINCI_SYSTEM_MODULE_BASE) 473d357619SMasahiro Yamada 483d357619SMasahiro Yamada #endif /* !CONFIG_SOC_DA8XX */ 493d357619SMasahiro Yamada #endif /* _DV_SYSCFG_DEFS_H_ */ 50