xref: /openbmc/u-boot/arch/arm/mach-bcm283x/reset.c (revision 22c793e6a26505fdf80cb5b099142dd6f8f0fff9)
1ddf6bd48SMasahiro Yamada /*
2ddf6bd48SMasahiro Yamada  * (C) Copyright 2012 Stephen Warren
3ddf6bd48SMasahiro Yamada  *
4ddf6bd48SMasahiro Yamada  * See file CREDITS for list of people who contributed to this
5ddf6bd48SMasahiro Yamada  * project.
6ddf6bd48SMasahiro Yamada  *
75b8031ccSTom Rini  * SPDX-License-Identifier:	GPL-2.0
8ddf6bd48SMasahiro Yamada  */
9ddf6bd48SMasahiro Yamada 
10ddf6bd48SMasahiro Yamada #include <common.h>
11ddf6bd48SMasahiro Yamada #include <asm/io.h>
12ddf6bd48SMasahiro Yamada #include <asm/arch/wdog.h>
136b0ee506SAlexander Graf #include <efi_loader.h>
14ddf6bd48SMasahiro Yamada 
15ddf6bd48SMasahiro Yamada #define RESET_TIMEOUT 10
16ddf6bd48SMasahiro Yamada 
176b0ee506SAlexander Graf /*
186b0ee506SAlexander Graf  * The Raspberry Pi firmware uses the RSTS register to know which partiton
196b0ee506SAlexander Graf  * to boot from. The partiton value is spread into bits 0, 2, 4, 6, 8, 10.
206b0ee506SAlexander Graf  * Partiton 63 is a special partition used by the firmware to indicate halt.
216b0ee506SAlexander Graf  */
226b0ee506SAlexander Graf #define BCM2835_WDOG_RSTS_RASPBERRYPI_HALT	0x555
236b0ee506SAlexander Graf 
2445a6d231SPaolo Pisati /* max ticks timeout */
2545a6d231SPaolo Pisati #define BCM2835_WDOG_MAX_TIMEOUT	0x000fffff
2645a6d231SPaolo Pisati 
2745a6d231SPaolo Pisati #ifdef CONFIG_BCM2835_WDT
2845a6d231SPaolo Pisati extern void hw_watchdog_disable(void);
2945a6d231SPaolo Pisati #else
3045a6d231SPaolo Pisati void hw_watchdog_disable(void) {}
3145a6d231SPaolo Pisati #endif
3245a6d231SPaolo Pisati 
336b0ee506SAlexander Graf __efi_runtime_data struct bcm2835_wdog_regs *wdog_regs =
34ddf6bd48SMasahiro Yamada 	(struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
356b0ee506SAlexander Graf 
3645a6d231SPaolo Pisati void __efi_runtime reset_cpu(ulong ticks)
376b0ee506SAlexander Graf {
3845a6d231SPaolo Pisati 	uint32_t rstc, timeout;
3945a6d231SPaolo Pisati 
4045a6d231SPaolo Pisati 	if (ticks == 0) {
4145a6d231SPaolo Pisati 		hw_watchdog_disable();
4245a6d231SPaolo Pisati 		timeout = RESET_TIMEOUT;
4345a6d231SPaolo Pisati 	} else
4445a6d231SPaolo Pisati 		timeout = ticks & BCM2835_WDOG_MAX_TIMEOUT;
45ddf6bd48SMasahiro Yamada 
466b0ee506SAlexander Graf 	rstc = readl(&wdog_regs->rstc);
47ddf6bd48SMasahiro Yamada 	rstc &= ~BCM2835_WDOG_RSTC_WRCFG_MASK;
48ddf6bd48SMasahiro Yamada 	rstc |= BCM2835_WDOG_RSTC_WRCFG_FULL_RESET;
49ddf6bd48SMasahiro Yamada 
5045a6d231SPaolo Pisati 	writel(BCM2835_WDOG_PASSWORD | timeout, &wdog_regs->wdog);
516b0ee506SAlexander Graf 	writel(BCM2835_WDOG_PASSWORD | rstc, &wdog_regs->rstc);
52ddf6bd48SMasahiro Yamada }
536b0ee506SAlexander Graf 
546b0ee506SAlexander Graf #ifdef CONFIG_EFI_LOADER
556b0ee506SAlexander Graf 
566b0ee506SAlexander Graf void __efi_runtime EFIAPI efi_reset_system(
576b0ee506SAlexander Graf 			enum efi_reset_type reset_type,
586b0ee506SAlexander Graf 			efi_status_t reset_status,
596b0ee506SAlexander Graf 			unsigned long data_size, void *reset_data)
606b0ee506SAlexander Graf {
616b0ee506SAlexander Graf 	u32 val;
626b0ee506SAlexander Graf 
636b0ee506SAlexander Graf 	switch (reset_type) {
646b0ee506SAlexander Graf 	case EFI_RESET_COLD:
656b0ee506SAlexander Graf 	case EFI_RESET_WARM:
666b0ee506SAlexander Graf 		reset_cpu(0);
676b0ee506SAlexander Graf 		break;
686b0ee506SAlexander Graf 	case EFI_RESET_SHUTDOWN:
696b0ee506SAlexander Graf 		/*
706b0ee506SAlexander Graf 		 * We set the watchdog hard reset bit here to distinguish this reset
716b0ee506SAlexander Graf 		 * from the normal (full) reset. bootcode.bin will not reboot after a
726b0ee506SAlexander Graf 		 * hard reset.
736b0ee506SAlexander Graf 		 */
746b0ee506SAlexander Graf 		val = readl(&wdog_regs->rsts);
756b0ee506SAlexander Graf 		val |= BCM2835_WDOG_PASSWORD;
766b0ee506SAlexander Graf 		val |= BCM2835_WDOG_RSTS_RASPBERRYPI_HALT;
776b0ee506SAlexander Graf 		writel(val, &wdog_regs->rsts);
786b0ee506SAlexander Graf 		reset_cpu(0);
796b0ee506SAlexander Graf 		break;
806b0ee506SAlexander Graf 	}
816b0ee506SAlexander Graf 
826b0ee506SAlexander Graf 	while (1) { }
836b0ee506SAlexander Graf }
846b0ee506SAlexander Graf 
85*22c793e6SHeinrich Schuchardt efi_status_t efi_reset_system_init(void)
866b0ee506SAlexander Graf {
87*22c793e6SHeinrich Schuchardt 	return efi_add_runtime_mmio(&wdog_regs, sizeof(*wdog_regs));
886b0ee506SAlexander Graf }
896b0ee506SAlexander Graf 
906b0ee506SAlexander Graf #endif
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