1*83d290c5STom Rini/* SPDX-License-Identifier: GPL-2.0+ */ 21cfe9fa0SMasahiro Yamada/* 31cfe9fa0SMasahiro Yamada * arch/arm/include/debug/8250.S 41cfe9fa0SMasahiro Yamada * 51cfe9fa0SMasahiro Yamada * Copyright (C) 1994-2013 Russell King 61cfe9fa0SMasahiro Yamada */ 71cfe9fa0SMasahiro Yamada#include <linux/serial_reg.h> 81cfe9fa0SMasahiro Yamada 91cfe9fa0SMasahiro Yamada .macro addruart, rp, rv, tmp 101cfe9fa0SMasahiro Yamada ldr \rp, =CONFIG_DEBUG_UART_PHYS 111cfe9fa0SMasahiro Yamada ldr \rv, =CONFIG_DEBUG_UART_VIRT 121cfe9fa0SMasahiro Yamada .endm 131cfe9fa0SMasahiro Yamada 141cfe9fa0SMasahiro Yamada#ifdef CONFIG_DEBUG_UART_8250_WORD 151cfe9fa0SMasahiro Yamada .macro store, rd, rx:vararg 161cfe9fa0SMasahiro Yamada str \rd, \rx 171cfe9fa0SMasahiro Yamada .endm 181cfe9fa0SMasahiro Yamada 191cfe9fa0SMasahiro Yamada .macro load, rd, rx:vararg 201cfe9fa0SMasahiro Yamada ldr \rd, \rx 211cfe9fa0SMasahiro Yamada .endm 221cfe9fa0SMasahiro Yamada#else 231cfe9fa0SMasahiro Yamada .macro store, rd, rx:vararg 241cfe9fa0SMasahiro Yamada strb \rd, \rx 251cfe9fa0SMasahiro Yamada .endm 261cfe9fa0SMasahiro Yamada 271cfe9fa0SMasahiro Yamada .macro load, rd, rx:vararg 281cfe9fa0SMasahiro Yamada ldrb \rd, \rx 291cfe9fa0SMasahiro Yamada .endm 301cfe9fa0SMasahiro Yamada#endif 311cfe9fa0SMasahiro Yamada 321cfe9fa0SMasahiro Yamada#define UART_SHIFT CONFIG_DEBUG_UART_8250_SHIFT 331cfe9fa0SMasahiro Yamada 341cfe9fa0SMasahiro Yamada .macro senduart,rd,rx 351cfe9fa0SMasahiro Yamada store \rd, [\rx, #UART_TX << UART_SHIFT] 361cfe9fa0SMasahiro Yamada .endm 371cfe9fa0SMasahiro Yamada 381cfe9fa0SMasahiro Yamada .macro busyuart,rd,rx 391cfe9fa0SMasahiro Yamada1002: load \rd, [\rx, #UART_LSR << UART_SHIFT] 401cfe9fa0SMasahiro Yamada and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE 411cfe9fa0SMasahiro Yamada teq \rd, #UART_LSR_TEMT | UART_LSR_THRE 421cfe9fa0SMasahiro Yamada bne 1002b 431cfe9fa0SMasahiro Yamada .endm 441cfe9fa0SMasahiro Yamada 451cfe9fa0SMasahiro Yamada .macro waituart,rd,rx 461cfe9fa0SMasahiro Yamada#ifdef CONFIG_DEBUG_UART_8250_FLOW_CONTROL 471cfe9fa0SMasahiro Yamada1001: load \rd, [\rx, #UART_MSR << UART_SHIFT] 481cfe9fa0SMasahiro Yamada tst \rd, #UART_MSR_CTS 491cfe9fa0SMasahiro Yamada beq 1001b 501cfe9fa0SMasahiro Yamada#endif 511cfe9fa0SMasahiro Yamada .endm 52