1*93bc2193SAneesh V /* 2*93bc2193SAneesh V * (C) Copyright 2010 3*93bc2193SAneesh V * Texas Instruments, <www.ti.com> 4*93bc2193SAneesh V * Aneesh V <aneesh@ti.com> 5*93bc2193SAneesh V * 6*93bc2193SAneesh V * See file CREDITS for list of people who contributed to this 7*93bc2193SAneesh V * project. 8*93bc2193SAneesh V * 9*93bc2193SAneesh V * This program is free software; you can redistribute it and/or 10*93bc2193SAneesh V * modify it under the terms of the GNU General Public License as 11*93bc2193SAneesh V * published by the Free Software Foundation; either version 2 of 12*93bc2193SAneesh V * the License, or (at your option) any later version. 13*93bc2193SAneesh V * 14*93bc2193SAneesh V * This program is distributed in the hope that it will be useful, 15*93bc2193SAneesh V * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*93bc2193SAneesh V * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*93bc2193SAneesh V * GNU General Public License for more details. 18*93bc2193SAneesh V * 19*93bc2193SAneesh V * You should have received a copy of the GNU General Public License 20*93bc2193SAneesh V * along with this program; if not, write to the Free Software 21*93bc2193SAneesh V * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22*93bc2193SAneesh V * MA 02111-1307 USA 23*93bc2193SAneesh V */ 24*93bc2193SAneesh V #ifndef _PL310_H_ 25*93bc2193SAneesh V #define _PL310_H_ 26*93bc2193SAneesh V 27*93bc2193SAneesh V #include <linux/types.h> 28*93bc2193SAneesh V 29*93bc2193SAneesh V /* Register bit fields */ 30*93bc2193SAneesh V #define PL310_AUX_CTRL_ASSOCIATIVITY_MASK (1 << 16) 31*93bc2193SAneesh V 32*93bc2193SAneesh V struct pl310_regs { 33*93bc2193SAneesh V u32 pl310_cache_id; 34*93bc2193SAneesh V u32 pl310_cache_type; 35*93bc2193SAneesh V u32 pad1[62]; 36*93bc2193SAneesh V u32 pl310_ctrl; 37*93bc2193SAneesh V u32 pl310_aux_ctrl; 38*93bc2193SAneesh V u32 pl310_tag_latency_ctrl; 39*93bc2193SAneesh V u32 pl310_data_latency_ctrl; 40*93bc2193SAneesh V u32 pad2[60]; 41*93bc2193SAneesh V u32 pl310_event_cnt_ctrl; 42*93bc2193SAneesh V u32 pl310_event_cnt1_cfg; 43*93bc2193SAneesh V u32 pl310_event_cnt0_cfg; 44*93bc2193SAneesh V u32 pl310_event_cnt1_val; 45*93bc2193SAneesh V u32 pl310_event_cnt0_val; 46*93bc2193SAneesh V u32 pl310_intr_mask; 47*93bc2193SAneesh V u32 pl310_masked_intr_stat; 48*93bc2193SAneesh V u32 pl310_raw_intr_stat; 49*93bc2193SAneesh V u32 pl310_intr_clear; 50*93bc2193SAneesh V u32 pad3[323]; 51*93bc2193SAneesh V u32 pl310_cache_sync; 52*93bc2193SAneesh V u32 pad4[15]; 53*93bc2193SAneesh V u32 pl310_inv_line_pa; 54*93bc2193SAneesh V u32 pad5[2]; 55*93bc2193SAneesh V u32 pl310_inv_way; 56*93bc2193SAneesh V u32 pad6[12]; 57*93bc2193SAneesh V u32 pl310_clean_line_pa; 58*93bc2193SAneesh V u32 pad7[1]; 59*93bc2193SAneesh V u32 pl310_clean_line_idx; 60*93bc2193SAneesh V u32 pl310_clean_way; 61*93bc2193SAneesh V u32 pad8[12]; 62*93bc2193SAneesh V u32 pl310_clean_inv_line_pa; 63*93bc2193SAneesh V u32 pad9[1]; 64*93bc2193SAneesh V u32 pl310_clean_inv_line_idx; 65*93bc2193SAneesh V u32 pl310_clean_inv_way; 66*93bc2193SAneesh V }; 67*93bc2193SAneesh V 68*93bc2193SAneesh V void pl310_inval_all(void); 69*93bc2193SAneesh V void pl310_clean_inval_all(void); 70*93bc2193SAneesh V void pl310_inval_range(u32 start, u32 end); 71*93bc2193SAneesh V void pl310_clean_inval_range(u32 start, u32 end); 72*93bc2193SAneesh V 73*93bc2193SAneesh V #endif 74