12fc65e28STom Warren /* 22fc65e28STom Warren * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. 32fc65e28STom Warren * 42fc65e28STom Warren * This program is free software; you can redistribute it and/or modify it 52fc65e28STom Warren * under the terms and conditions of the GNU General Public License, 62fc65e28STom Warren * version 2, as published by the Free Software Foundation. 72fc65e28STom Warren * 82fc65e28STom Warren * This program is distributed in the hope it will be useful, but WITHOUT 92fc65e28STom Warren * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 102fc65e28STom Warren * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 112fc65e28STom Warren * more details. 122fc65e28STom Warren * 132fc65e28STom Warren * You should have received a copy of the GNU General Public License 142fc65e28STom Warren * along with this program. If not, see <http://www.gnu.org/licenses/>. 152fc65e28STom Warren */ 162fc65e28STom Warren 172fc65e28STom Warren #ifndef _TEGRA114_H_ 182fc65e28STom Warren #define _TEGRA114_H_ 192fc65e28STom Warren 202fc65e28STom Warren #define NV_PA_SDRAM_BASE 0x80000000 /* 0x80000000 for real T114 */ 21*b40f734aSTom Warren #define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */ 222fc65e28STom Warren 232fc65e28STom Warren #include <asm/arch-tegra/tegra.h> 242fc65e28STom Warren 252fc65e28STom Warren #define BCT_ODMDATA_OFFSET 1752 /* offset to ODMDATA word */ 262fc65e28STom Warren 272fc65e28STom Warren #undef NVBOOTINFOTABLE_BCTSIZE 282fc65e28STom Warren #undef NVBOOTINFOTABLE_BCTPTR 292fc65e28STom Warren #define NVBOOTINFOTABLE_BCTSIZE 0x48 /* BCT size in BIT in IRAM */ 302fc65e28STom Warren #define NVBOOTINFOTABLE_BCTPTR 0x4C /* BCT pointer in BIT in IRAM */ 312fc65e28STom Warren 322fc65e28STom Warren #define MAX_NUM_CPU 4 332fc65e28STom Warren 342fc65e28STom Warren #endif /* TEGRA114_H */ 35