1*2fc65e28STom Warren /* 2*2fc65e28STom Warren * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. 3*2fc65e28STom Warren * 4*2fc65e28STom Warren * This program is free software; you can redistribute it and/or modify it 5*2fc65e28STom Warren * under the terms and conditions of the GNU General Public License, 6*2fc65e28STom Warren * version 2, as published by the Free Software Foundation. 7*2fc65e28STom Warren * 8*2fc65e28STom Warren * This program is distributed in the hope it will be useful, but WITHOUT 9*2fc65e28STom Warren * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10*2fc65e28STom Warren * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11*2fc65e28STom Warren * more details. 12*2fc65e28STom Warren * 13*2fc65e28STom Warren * You should have received a copy of the GNU General Public License 14*2fc65e28STom Warren * along with this program. If not, see <http://www.gnu.org/licenses/>. 15*2fc65e28STom Warren */ 16*2fc65e28STom Warren 17*2fc65e28STom Warren #ifndef _TEGRA114_H_ 18*2fc65e28STom Warren #define _TEGRA114_H_ 19*2fc65e28STom Warren 20*2fc65e28STom Warren #define NV_PA_SDRAM_BASE 0x80000000 /* 0x80000000 for real T114 */ 21*2fc65e28STom Warren 22*2fc65e28STom Warren #include <asm/arch-tegra/tegra.h> 23*2fc65e28STom Warren 24*2fc65e28STom Warren #define BCT_ODMDATA_OFFSET 1752 /* offset to ODMDATA word */ 25*2fc65e28STom Warren 26*2fc65e28STom Warren #undef NVBOOTINFOTABLE_BCTSIZE 27*2fc65e28STom Warren #undef NVBOOTINFOTABLE_BCTPTR 28*2fc65e28STom Warren #define NVBOOTINFOTABLE_BCTSIZE 0x48 /* BCT size in BIT in IRAM */ 29*2fc65e28STom Warren #define NVBOOTINFOTABLE_BCTPTR 0x4C /* BCT pointer in BIT in IRAM */ 30*2fc65e28STom Warren 31*2fc65e28STom Warren #define MAX_NUM_CPU 4 32*2fc65e28STom Warren 33*2fc65e28STom Warren #endif /* TEGRA114_H */ 34