183d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2643cf0eaSIan Campbell /* 3643cf0eaSIan Campbell * (C) Copyright 2007-2011 4643cf0eaSIan Campbell * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 5643cf0eaSIan Campbell * Tom Cubie <tangliang@allwinnertech.com> 6643cf0eaSIan Campbell * 7643cf0eaSIan Campbell * Configuration settings for the Allwinner A10-evb board. 8643cf0eaSIan Campbell */ 9643cf0eaSIan Campbell 10643cf0eaSIan Campbell #ifndef _SUNXI_TIMER_H_ 11643cf0eaSIan Campbell #define _SUNXI_TIMER_H_ 12643cf0eaSIan Campbell 13643cf0eaSIan Campbell #ifndef __ASSEMBLY__ 14643cf0eaSIan Campbell 15643cf0eaSIan Campbell #include <linux/types.h> 162b679f9fSChen-Yu Tsai #include <asm/arch/watchdog.h> 17643cf0eaSIan Campbell 18643cf0eaSIan Campbell /* General purpose timer */ 19643cf0eaSIan Campbell struct sunxi_timer { 20643cf0eaSIan Campbell u32 ctl; 21643cf0eaSIan Campbell u32 inter; 22643cf0eaSIan Campbell u32 val; 23643cf0eaSIan Campbell u8 res[4]; 24643cf0eaSIan Campbell }; 25643cf0eaSIan Campbell 26643cf0eaSIan Campbell /* Audio video sync*/ 27643cf0eaSIan Campbell struct sunxi_avs { 28643cf0eaSIan Campbell u32 ctl; /* 0x80 */ 29643cf0eaSIan Campbell u32 cnt0; /* 0x84 */ 30643cf0eaSIan Campbell u32 cnt1; /* 0x88 */ 31643cf0eaSIan Campbell u32 div; /* 0x8c */ 32643cf0eaSIan Campbell }; 33643cf0eaSIan Campbell 34643cf0eaSIan Campbell /* 64 bit counter */ 35643cf0eaSIan Campbell struct sunxi_64cnt { 36643cf0eaSIan Campbell u32 ctl; /* 0xa0 */ 37643cf0eaSIan Campbell u32 lo; /* 0xa4 */ 38643cf0eaSIan Campbell u32 hi; /* 0xa8 */ 39643cf0eaSIan Campbell }; 40643cf0eaSIan Campbell 41643cf0eaSIan Campbell /* Rtc */ 42643cf0eaSIan Campbell struct sunxi_rtc { 43643cf0eaSIan Campbell u32 ctl; /* 0x100 */ 44643cf0eaSIan Campbell u32 yymmdd; /* 0x104 */ 45643cf0eaSIan Campbell u32 hhmmss; /* 0x108 */ 46643cf0eaSIan Campbell }; 47643cf0eaSIan Campbell 48643cf0eaSIan Campbell /* Alarm */ 49643cf0eaSIan Campbell struct sunxi_alarm { 50643cf0eaSIan Campbell u32 ddhhmmss; /* 0x10c */ 51643cf0eaSIan Campbell u32 hhmmss; /* 0x110 */ 52643cf0eaSIan Campbell u32 en; /* 0x114 */ 53643cf0eaSIan Campbell u32 irqen; /* 0x118 */ 54643cf0eaSIan Campbell u32 irqsta; /* 0x11c */ 55643cf0eaSIan Campbell }; 56643cf0eaSIan Campbell 57643cf0eaSIan Campbell /* Timer general purpose register */ 58643cf0eaSIan Campbell struct sunxi_tgp { 59643cf0eaSIan Campbell u32 tgpd; 60643cf0eaSIan Campbell }; 61643cf0eaSIan Campbell 62643cf0eaSIan Campbell struct sunxi_timer_reg { 63643cf0eaSIan Campbell u32 tirqen; /* 0x00 */ 64643cf0eaSIan Campbell u32 tirqsta; /* 0x04 */ 65643cf0eaSIan Campbell u8 res1[8]; 66643cf0eaSIan Campbell struct sunxi_timer timer[6]; /* We have 6 timers */ 67643cf0eaSIan Campbell u8 res2[16]; 68643cf0eaSIan Campbell struct sunxi_avs avs; 696c7ae2bfSChen-Yu Tsai #if defined(CONFIG_SUNXI_GEN_SUN4I) || defined(CONFIG_MACH_SUN8I_R40) 702b679f9fSChen-Yu Tsai struct sunxi_wdog wdog; /* 0x90 */ 714cdefba8SChen-Yu Tsai /* XXX the following is not accurate for sun5i/sun7i */ 722b679f9fSChen-Yu Tsai struct sunxi_64cnt cnt64; /* 0xa0 */ 73643cf0eaSIan Campbell u8 res4[0x58]; 74643cf0eaSIan Campbell struct sunxi_rtc rtc; 75643cf0eaSIan Campbell struct sunxi_alarm alarm; 76643cf0eaSIan Campbell struct sunxi_tgp tgp[4]; 77643cf0eaSIan Campbell u8 res5[8]; 78643cf0eaSIan Campbell u32 cpu_cfg; 79*10196c96SIcenowy Zheng #elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_MACH_SUN50I_H6) 804cdefba8SChen-Yu Tsai u8 res3[16]; 814cdefba8SChen-Yu Tsai struct sunxi_wdog wdog[5]; /* We have 5 watchdogs */ 824cdefba8SChen-Yu Tsai #endif 83643cf0eaSIan Campbell }; 84643cf0eaSIan Campbell 85643cf0eaSIan Campbell #endif /* __ASSEMBLY__ */ 86643cf0eaSIan Campbell 87643cf0eaSIan Campbell #endif 88