1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 29fa32b12SVikas Manocha /* 31537d386SPatrice Chotard * Copyright (C) 2014, STMicroelectronics - All Rights Reserved 41537d386SPatrice Chotard * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. 59fa32b12SVikas Manocha */ 69fa32b12SVikas Manocha 79fa32b12SVikas Manocha #ifndef __ASM_ARM_ARCH_PERIPH_H 89fa32b12SVikas Manocha #define __ASM_ARM_ARCH_PERIPH_H 99fa32b12SVikas Manocha 109fa32b12SVikas Manocha /* 119fa32b12SVikas Manocha * Peripherals required for pinmux configuration. List will 129fa32b12SVikas Manocha * grow with support for more devices getting added. 139fa32b12SVikas Manocha * Numbering based on interrupt table. 149fa32b12SVikas Manocha * 159fa32b12SVikas Manocha */ 169fa32b12SVikas Manocha enum periph_id { 179fa32b12SVikas Manocha UART_GPIOC_30_31 = 0, 189fa32b12SVikas Manocha UART_GPIOB_16_17, 192ce4eaf4SVikas Manocha ETH_GPIOB_10_31_C_0_4, 2054afb500SVikas Manocha QSPI_CS_CLK_PAD, 219fa32b12SVikas Manocha PERIPH_ID_I2C0, 229fa32b12SVikas Manocha PERIPH_ID_I2C1, 239fa32b12SVikas Manocha PERIPH_ID_I2C2, 249fa32b12SVikas Manocha PERIPH_ID_I2C3, 259fa32b12SVikas Manocha PERIPH_ID_I2C4, 269fa32b12SVikas Manocha PERIPH_ID_I2C5, 279fa32b12SVikas Manocha PERIPH_ID_I2C6, 289fa32b12SVikas Manocha PERIPH_ID_I2C7, 299fa32b12SVikas Manocha PERIPH_ID_SPI0, 309fa32b12SVikas Manocha PERIPH_ID_SPI1, 319fa32b12SVikas Manocha PERIPH_ID_SPI2, 329fa32b12SVikas Manocha PERIPH_ID_SDMMC0, 339fa32b12SVikas Manocha PERIPH_ID_SDMMC1, 349fa32b12SVikas Manocha PERIPH_ID_SDMMC2, 359fa32b12SVikas Manocha PERIPH_ID_SDMMC3, 369fa32b12SVikas Manocha PERIPH_ID_I2S1, 379fa32b12SVikas Manocha }; 389fa32b12SVikas Manocha 399fa32b12SVikas Manocha enum periph_clock { 409fa32b12SVikas Manocha UART_CLOCK_CFG = 0, 419fa32b12SVikas Manocha ETH_CLOCK_CFG, 4254afb500SVikas Manocha QSPI_CLOCK_CFG, 439fa32b12SVikas Manocha }; 449fa32b12SVikas Manocha 459fa32b12SVikas Manocha #endif /* __ASM_ARM_ARCH_PERIPH_H */ 46