1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 29702ec00SEddy Petrișor /* 39702ec00SEddy Petrișor * (C) Copyright 2015, Freescale Semiconductor, Inc. 49702ec00SEddy Petrișor */ 59702ec00SEddy Petrișor 69702ec00SEddy Petrișor #ifndef __ARCH_ARM_MACH_S32V234_MCRGM_REGS_H__ 79702ec00SEddy Petrișor #define __ARCH_ARM_MACH_S32V234_MCRGM_REGS_H__ 89702ec00SEddy Petrișor 99702ec00SEddy Petrișor #define MC_RGM_DES (MC_RGM_BASE_ADDR) 109702ec00SEddy Petrișor #define MC_RGM_FES (MC_RGM_BASE_ADDR + 0x300) 119702ec00SEddy Petrișor #define MC_RGM_FERD (MC_RGM_BASE_ADDR + 0x310) 129702ec00SEddy Petrișor #define MC_RGM_FBRE (MC_RGM_BASE_ADDR + 0x330) 139702ec00SEddy Petrișor #define MC_RGM_FESS (MC_RGM_BASE_ADDR + 0x340) 149702ec00SEddy Petrișor #define MC_RGM_DDR_HE (MC_RGM_BASE_ADDR + 0x350) 159702ec00SEddy Petrișor #define MC_RGM_DDR_HS (MC_RGM_BASE_ADDR + 0x354) 169702ec00SEddy Petrișor #define MC_RGM_FRHE (MC_RGM_BASE_ADDR + 0x358) 179702ec00SEddy Petrișor #define MC_RGM_FREC (MC_RGM_BASE_ADDR + 0x600) 189702ec00SEddy Petrișor #define MC_RGM_FRET (MC_RGM_BASE_ADDR + 0x607) 199702ec00SEddy Petrișor #define MC_RGM_DRET (MC_RGM_BASE_ADDR + 0x60B) 209702ec00SEddy Petrișor 219702ec00SEddy Petrișor /* function reset sources mask */ 229702ec00SEddy Petrișor #define F_SWT4 0x8000 239702ec00SEddy Petrișor #define F_JTAG 0x400 249702ec00SEddy Petrișor #define F_FCCU_SOFT 0x40 259702ec00SEddy Petrișor #define F_FCCU_HARD 0x20 269702ec00SEddy Petrișor #define F_SOFT_FUNC 0x8 279702ec00SEddy Petrișor #define F_ST_DONE 0x4 289702ec00SEddy Petrișor #define F_EXT_RST 0x1 299702ec00SEddy Petrișor 309702ec00SEddy Petrișor #endif /* __ARCH_ARM_MACH_S32V234_MCRGM_REGS_H__ */ 31