1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 207d8d35aShuang lin /* 307d8d35aShuang lin * (C) Copyright 2015 Rockchip Electronics Co., Ltd 407d8d35aShuang lin */ 507d8d35aShuang lin 607d8d35aShuang lin #ifndef __ASM_ARCH_UART_H 707d8d35aShuang lin #define __ASM_ARCH_UART_H 807d8d35aShuang lin struct rk_uart { 907d8d35aShuang lin unsigned int rbr; /* Receive buffer register. */ 1007d8d35aShuang lin unsigned int ier; /* Interrupt enable register. */ 1107d8d35aShuang lin unsigned int fcr; /* FIFO control register. */ 1207d8d35aShuang lin unsigned int lcr; /* Line control register. */ 1307d8d35aShuang lin unsigned int mcr; /* Modem control register. */ 1407d8d35aShuang lin unsigned int lsr; /* Line status register. */ 1507d8d35aShuang lin unsigned int msr; /* Modem status register. */ 1607d8d35aShuang lin unsigned int scr; 1707d8d35aShuang lin unsigned int reserved1[(0x30 - 0x20) / 4]; 1807d8d35aShuang lin unsigned int srbr[(0x70 - 0x30) / 4]; 1907d8d35aShuang lin unsigned int far; 2007d8d35aShuang lin unsigned int tfr; 2107d8d35aShuang lin unsigned int rfw; 2207d8d35aShuang lin unsigned int usr; 2307d8d35aShuang lin unsigned int tfl; 2407d8d35aShuang lin unsigned int rfl; 2507d8d35aShuang lin unsigned int srr; 2607d8d35aShuang lin unsigned int srts; 2707d8d35aShuang lin unsigned int sbcr; 2807d8d35aShuang lin unsigned int sdmam; 2907d8d35aShuang lin unsigned int sfe; 3007d8d35aShuang lin unsigned int srt; 3107d8d35aShuang lin unsigned int stet; 3207d8d35aShuang lin unsigned int htx; 3307d8d35aShuang lin unsigned int dmasa; 3407d8d35aShuang lin unsigned int reserver2[(0xf4 - 0xac) / 4]; 3507d8d35aShuang lin unsigned int cpr; 3607d8d35aShuang lin unsigned int ucv; 3707d8d35aShuang lin unsigned int ctr; 3807d8d35aShuang lin }; 3907d8d35aShuang lin 4007d8d35aShuang lin void rk_uart_init(void *base); 4107d8d35aShuang lin void print_hex(unsigned int n); 4207d8d35aShuang lin void print(char *s); 4307d8d35aShuang lin #endif 44