1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0 */ 23e747197SHeiko Stübner /* 33e747197SHeiko Stübner * (C) Copyright 2015 Google, Inc 43e747197SHeiko Stübner */ 53e747197SHeiko Stübner 63e747197SHeiko Stübner #ifndef _ASM_ARCH_DDR_RK3188_H 73e747197SHeiko Stübner #define _ASM_ARCH_DDR_RK3188_H 83e747197SHeiko Stübner 93e747197SHeiko Stübner #include <asm/arch/ddr_rk3288.h> 103e747197SHeiko Stübner 113e747197SHeiko Stübner /* 123e747197SHeiko Stübner * RK3188 Memory scheduler register map. 133e747197SHeiko Stübner */ 143e747197SHeiko Stübner struct rk3188_msch { 153e747197SHeiko Stübner u32 coreid; 163e747197SHeiko Stübner u32 revisionid; 173e747197SHeiko Stübner u32 ddrconf; 183e747197SHeiko Stübner u32 ddrtiming; 193e747197SHeiko Stübner u32 ddrmode; 203e747197SHeiko Stübner u32 readlatency; 213e747197SHeiko Stübner }; 223e747197SHeiko Stübner check_member(rk3188_msch, readlatency, 0x0014); 233e747197SHeiko Stübner 243e747197SHeiko Stübner #endif 25