1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2b9e65a79SIlya Yanok /* 3b9e65a79SIlya Yanok * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> 4b9e65a79SIlya Yanok * 5b9e65a79SIlya Yanok * Based on: 6b9e65a79SIlya Yanok * 7b9e65a79SIlya Yanok * ---------------------------------------------------------------------------- 8b9e65a79SIlya Yanok * 9b9e65a79SIlya Yanok * dm644x_emac.h 10b9e65a79SIlya Yanok * 11b9e65a79SIlya Yanok * TI DaVinci (DM644X) EMAC peripheral driver header for DV-EVM 12b9e65a79SIlya Yanok * 13b9e65a79SIlya Yanok * Copyright (C) 2005 Texas Instruments. 14b9e65a79SIlya Yanok * 15b9e65a79SIlya Yanok * ---------------------------------------------------------------------------- 16b9e65a79SIlya Yanok * 17b9e65a79SIlya Yanok * Modifications: 18b9e65a79SIlya Yanok * ver. 1.0: Sep 2005, TI PSP Team - Created EMAC version for uBoot. 19b9e65a79SIlya Yanok */ 20b9e65a79SIlya Yanok 21b9e65a79SIlya Yanok #ifndef _AM3517_EMAC_H_ 22b9e65a79SIlya Yanok #define _AM3517_EMAC_H_ 23b9e65a79SIlya Yanok 24b9e65a79SIlya Yanok #define EMAC_BASE_ADDR 0x5C010000 25b9e65a79SIlya Yanok #define EMAC_WRAPPER_BASE_ADDR 0x5C000000 26b9e65a79SIlya Yanok #define EMAC_WRAPPER_RAM_ADDR 0x5C020000 27b9e65a79SIlya Yanok #define EMAC_MDIO_BASE_ADDR 0x5C030000 28b9e65a79SIlya Yanok #define EMAC_HW_RAM_ADDR 0x01E20000 29b9e65a79SIlya Yanok 30b9e65a79SIlya Yanok #define EMAC_MDIO_BUS_FREQ 166000000 /* 166 MHZ check */ 31b9e65a79SIlya Yanok #define EMAC_MDIO_CLOCK_FREQ 1000000 /* 2.0 MHz */ 32b9e65a79SIlya Yanok 33b9e65a79SIlya Yanok /* SOFTRESET macro definition interferes with emac_regs structure definition */ 34b9e65a79SIlya Yanok #undef SOFTRESET 35b9e65a79SIlya Yanok 36b9e65a79SIlya Yanok typedef volatile unsigned int dv_reg; 37b9e65a79SIlya Yanok typedef volatile unsigned int *dv_reg_p; 38b9e65a79SIlya Yanok 39b9e65a79SIlya Yanok #define DAVINCI_EMAC_VERSION2 40b9e65a79SIlya Yanok 41b9e65a79SIlya Yanok #endif /* _AM3517_EMAC_H_ */ 42