xref: /openbmc/u-boot/arch/arm/include/asm/arch-hi6220/pinmux.h (revision 83d290c56fab2d38cd1ab4c4cc7099559c1d5046)
1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */
28a954eb6SPeter Griffin /*
38a954eb6SPeter Griffin  * Copyright (C) 2015 Linaro
48a954eb6SPeter Griffin  * Peter Griffin <peter.griffin@linaro.org>
58a954eb6SPeter Griffin  */
68a954eb6SPeter Griffin 
78a954eb6SPeter Griffin #ifndef __ASM_ARM_ARCH_PINMUX_H
88a954eb6SPeter Griffin #define __ASM_ARM_ARCH_PINMUX_H
98a954eb6SPeter Griffin 
108a954eb6SPeter Griffin #include "periph.h"
118a954eb6SPeter Griffin 
128a954eb6SPeter Griffin 
138a954eb6SPeter Griffin /* iomg bit definition */
148a954eb6SPeter Griffin #define MUX_M0          0
158a954eb6SPeter Griffin #define MUX_M1          1
168a954eb6SPeter Griffin #define MUX_M2          2
178a954eb6SPeter Griffin #define MUX_M3          3
188a954eb6SPeter Griffin #define MUX_M4          4
198a954eb6SPeter Griffin #define MUX_M5          5
208a954eb6SPeter Griffin #define MUX_M6          6
218a954eb6SPeter Griffin #define MUX_M7          7
228a954eb6SPeter Griffin 
238a954eb6SPeter Griffin /* iocg bit definition */
248a954eb6SPeter Griffin #define PULL_MASK       (3)
258a954eb6SPeter Griffin #define PULL_DIS        (0)
268a954eb6SPeter Griffin #define PULL_UP         (1 << 0)
278a954eb6SPeter Griffin #define PULL_DOWN       (1 << 1)
288a954eb6SPeter Griffin 
298a954eb6SPeter Griffin /* drive strength definition */
308a954eb6SPeter Griffin #define DRIVE_MASK      (7 << 4)
318a954eb6SPeter Griffin #define DRIVE1_02MA     (0 << 4)
328a954eb6SPeter Griffin #define DRIVE1_04MA     (1 << 4)
338a954eb6SPeter Griffin #define DRIVE1_08MA     (2 << 4)
348a954eb6SPeter Griffin #define DRIVE1_10MA     (3 << 4)
358a954eb6SPeter Griffin #define DRIVE2_02MA     (0 << 4)
368a954eb6SPeter Griffin #define DRIVE2_04MA     (1 << 4)
378a954eb6SPeter Griffin #define DRIVE2_08MA     (2 << 4)
388a954eb6SPeter Griffin #define DRIVE2_10MA     (3 << 4)
398a954eb6SPeter Griffin #define DRIVE3_04MA     (0 << 4)
408a954eb6SPeter Griffin #define DRIVE3_08MA     (1 << 4)
418a954eb6SPeter Griffin #define DRIVE3_12MA     (2 << 4)
428a954eb6SPeter Griffin #define DRIVE3_16MA     (3 << 4)
438a954eb6SPeter Griffin #define DRIVE3_20MA     (4 << 4)
448a954eb6SPeter Griffin #define DRIVE3_24MA     (5 << 4)
458a954eb6SPeter Griffin #define DRIVE3_32MA     (6 << 4)
468a954eb6SPeter Griffin #define DRIVE3_40MA     (7 << 4)
478a954eb6SPeter Griffin #define DRIVE4_02MA     (0 << 4)
488a954eb6SPeter Griffin #define DRIVE4_04MA     (2 << 4)
498a954eb6SPeter Griffin #define DRIVE4_08MA     (4 << 4)
508a954eb6SPeter Griffin #define DRIVE4_10MA     (6 << 4)
518a954eb6SPeter Griffin 
528a954eb6SPeter Griffin #define HI6220_PINMUX0_BASE 0xf7010000
538a954eb6SPeter Griffin #define HI6220_PINMUX1_BASE 0xf7010800
548a954eb6SPeter Griffin 
558a954eb6SPeter Griffin #ifndef	__ASSEMBLY__
568a954eb6SPeter Griffin 
578a954eb6SPeter Griffin /* maybe more registers, but highest used is 123 */
588a954eb6SPeter Griffin #define REG_NUM 123
598a954eb6SPeter Griffin 
608a954eb6SPeter Griffin struct hi6220_pinmux0_regs {
618a954eb6SPeter Griffin 	uint32_t	iomg[REG_NUM];
628a954eb6SPeter Griffin };
638a954eb6SPeter Griffin 
648a954eb6SPeter Griffin struct hi6220_pinmux1_regs {
658a954eb6SPeter Griffin 	uint32_t	iocfg[REG_NUM];
668a954eb6SPeter Griffin };
678a954eb6SPeter Griffin 
688a954eb6SPeter Griffin #endif
698a954eb6SPeter Griffin 
708a954eb6SPeter Griffin /**
718a954eb6SPeter Griffin  * Configures the pinmux for a particular peripheral.
728a954eb6SPeter Griffin  *
738a954eb6SPeter Griffin  * This function will configure the peripheral pinmux along with
748a954eb6SPeter Griffin  * pull-up/down and drive strength.
758a954eb6SPeter Griffin  *
768a954eb6SPeter Griffin  * @param peripheral	peripheral to be configured
778a954eb6SPeter Griffin  * @return 0 if ok, -1 on error (e.g. unsupported peripheral)
788a954eb6SPeter Griffin  */
798a954eb6SPeter Griffin int hi6220_pinmux_config(int peripheral);
808a954eb6SPeter Griffin 
818a954eb6SPeter Griffin #endif
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