1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 29f3183d2SMingkai Hu /* 39f3183d2SMingkai Hu * Copyright 2014-2015, Freescale Semiconductor 49f3183d2SMingkai Hu */ 59f3183d2SMingkai Hu 69f3183d2SMingkai Hu #ifndef _FSL_LAYERSCAPE_MP_H 79f3183d2SMingkai Hu #define _FSL_LAYERSCAPE_MP_H 89f3183d2SMingkai Hu 99f3183d2SMingkai Hu /* 109f3183d2SMingkai Hu * Each spin table element is defined as 119f3183d2SMingkai Hu * struct { 129f3183d2SMingkai Hu * uint64_t entry_addr; 139f3183d2SMingkai Hu * uint64_t status; 149f3183d2SMingkai Hu * uint64_t lpid; 15020b3ce8SAlison Wang * uint64_t arch_comp; 169f3183d2SMingkai Hu * }; 179f3183d2SMingkai Hu * we pad this struct to 64 bytes so each entry is in its own cacheline 189f3183d2SMingkai Hu * the actual spin table is an array of these structures 199f3183d2SMingkai Hu */ 209f3183d2SMingkai Hu #define SPIN_TABLE_ELEM_ENTRY_ADDR_IDX 0 219f3183d2SMingkai Hu #define SPIN_TABLE_ELEM_STATUS_IDX 1 229f3183d2SMingkai Hu #define SPIN_TABLE_ELEM_LPID_IDX 2 23020b3ce8SAlison Wang /* compare os arch and cpu arch */ 24020b3ce8SAlison Wang #define SPIN_TABLE_ELEM_ARCH_COMP_IDX 3 259f3183d2SMingkai Hu #define WORDS_PER_SPIN_TABLE_ENTRY 8 /* pad to 64 bytes */ 269f3183d2SMingkai Hu #define SPIN_TABLE_ELEM_SIZE 64 279f3183d2SMingkai Hu 28020b3ce8SAlison Wang /* os arch is same as cpu arch */ 29020b3ce8SAlison Wang #define OS_ARCH_SAME 0 30020b3ce8SAlison Wang /* os arch is different from cpu arch */ 31020b3ce8SAlison Wang #define OS_ARCH_DIFF 1 32020b3ce8SAlison Wang 339f3183d2SMingkai Hu #define id_to_core(x) ((x & 3) | (x >> 6)) 349f3183d2SMingkai Hu #ifndef __ASSEMBLY__ 359f3183d2SMingkai Hu extern u64 __spin_table[]; 369f3183d2SMingkai Hu extern u64 __real_cntfrq; 379f3183d2SMingkai Hu extern u64 *secondary_boot_code; 389f3183d2SMingkai Hu extern size_t __secondary_boot_code_size; 39026f30ecSYuantian Tang #ifdef CONFIG_MP 409f3183d2SMingkai Hu int fsl_layerscape_wake_seconday_cores(void); 41026f30ecSYuantian Tang #else fsl_layerscape_wake_seconday_cores(void)42026f30ecSYuantian Tangstatic inline int fsl_layerscape_wake_seconday_cores(void) { return 0; } 43026f30ecSYuantian Tang #endif 449f3183d2SMingkai Hu void *get_spin_tbl_addr(void); 459f3183d2SMingkai Hu phys_addr_t determine_mp_bootpg(void); 469f3183d2SMingkai Hu void secondary_boot_func(void); 479f3183d2SMingkai Hu int is_core_online(u64 cpu_id); 48ef9a5fd8SYork Sun u32 cpu_pos_mask(void); 499f3183d2SMingkai Hu #endif 50ec6617c3SAlison Wang 519f3183d2SMingkai Hu #endif /* _FSL_LAYERSCAPE_MP_H */ 52