1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 29f3183d2SMingkai Hu /* 39f3183d2SMingkai Hu * Copyright 2015 Freescale Semiconductor, Inc. 49f3183d2SMingkai Hu * 59f3183d2SMingkai Hu */ 69f3183d2SMingkai Hu 79f3183d2SMingkai Hu #ifndef __ASM_ARCH_FSL_LAYERSCAPE_CLOCK_H_ 89f3183d2SMingkai Hu #define __ASM_ARCH_FSL_LAYERSCAPE_CLOCK_H_ 99f3183d2SMingkai Hu 109f3183d2SMingkai Hu #include <common.h> 119f3183d2SMingkai Hu 129f3183d2SMingkai Hu enum mxc_clock { 139f3183d2SMingkai Hu MXC_ARM_CLK = 0, 149f3183d2SMingkai Hu MXC_BUS_CLK, 159f3183d2SMingkai Hu MXC_UART_CLK, 169f3183d2SMingkai Hu MXC_ESDHC_CLK, 179f3183d2SMingkai Hu MXC_I2C_CLK, 189f3183d2SMingkai Hu MXC_DSPI_CLK, 199f3183d2SMingkai Hu }; 209f3183d2SMingkai Hu 219f3183d2SMingkai Hu unsigned int mxc_get_clock(enum mxc_clock clk); 226e2941d7SSimon Glass ulong get_ddr_freq(ulong); 236e2941d7SSimon Glass uint get_svr(void); 249f3183d2SMingkai Hu 259f3183d2SMingkai Hu #endif /* __ASM_ARCH_FSL_LAYERSCAPE_CLOCK_H_ */ 26