1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2da1f5ac2SScott Branden /* 3c89782dcSSuji Velupillai * Copyright 2014-2017 Broadcom. 4da1f5ac2SScott Branden */ 5da1f5ac2SScott Branden 6da1f5ac2SScott Branden #ifndef __ARCH_CONFIGS_H 7da1f5ac2SScott Branden #define __ARCH_CONFIGS_H 8da1f5ac2SScott Branden 9da1f5ac2SScott Branden #include <asm/iproc-common/configs.h> 10da1f5ac2SScott Branden 11da1f5ac2SScott Branden /* uArchitecture specifics */ 12da1f5ac2SScott Branden 13da1f5ac2SScott Branden /* Serial Info */ 14da1f5ac2SScott Branden /* Post pad 3 bytes after each reg addr */ 15da1f5ac2SScott Branden #define CONFIG_SYS_NS16550_REG_SIZE (-4) 16da1f5ac2SScott Branden #define CONFIG_SYS_NS16550_MEM32 17da1f5ac2SScott Branden 18da1f5ac2SScott Branden #define CONFIG_SYS_NS16550_CLK 100000000 19da1f5ac2SScott Branden #define CONFIG_SYS_NS16550_CLK_DIV 54 20da1f5ac2SScott Branden #define CONFIG_SERIAL_MULTI 21da1f5ac2SScott Branden #define CONFIG_SYS_NS16550_COM3 0x18023000 22da1f5ac2SScott Branden 2339d0ce06SJiandong Zheng /* Ethernet */ 2439d0ce06SJiandong Zheng #define CONFIG_PHY_BROADCOM 2539d0ce06SJiandong Zheng #define CONFIG_PHY_RESET_DELAY 10000 /* PHY reset delay in us*/ 2639d0ce06SJiandong Zheng 27da1f5ac2SScott Branden #endif /* __ARCH_CONFIGS_H */ 28