1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2cf946c6dSLei Wen /* 3cf946c6dSLei Wen * (C) Copyright 2011 4cf946c6dSLei Wen * Marvell Semiconductor <www.marvell.com> 5cf946c6dSLei Wen * Written-by: Lei Wen <leiwen@marvell.com> 6cf946c6dSLei Wen */ 7cf946c6dSLei Wen 8cf946c6dSLei Wen /* 9cf946c6dSLei Wen * This file should be included in board config header file. 10cf946c6dSLei Wen * 11cf946c6dSLei Wen * It supports common definitions for Armada100 platform 12cf946c6dSLei Wen */ 13cf946c6dSLei Wen 14cf946c6dSLei Wen #ifndef _ARMD1_CONFIG_H 15cf946c6dSLei Wen #define _ARMD1_CONFIG_H 16cf946c6dSLei Wen 17ab1b9552SLei Wen #include <asm/arch/armada100.h> 18cf946c6dSLei Wen 19cf946c6dSLei Wen #define CONFIG_SYS_TCLK (14745600) /* NS16550 clk config */ 20cf946c6dSLei Wen #define CONFIG_SYS_HZ_CLOCK (3250000) /* Timer Freq. 3.25MHZ */ 21cf946c6dSLei Wen #define CONFIG_MARVELL_MFP /* Enable mvmfp driver */ 22cf946c6dSLei Wen #define MV_MFPR_BASE ARMD1_MFPR_BASE 23cf946c6dSLei Wen #define MV_UART_CONSOLE_BASE ARMD1_UART1_BASE 24cf946c6dSLei Wen #define CONFIG_SYS_NS16550_IER (1 << 6) /* Bit 6 in UART_IER register 25cf946c6dSLei Wen represents UART Unit Enable */ 26cf946c6dSLei Wen 27cf946c6dSLei Wen #endif /* _ARMD1_CONFIG_H */ 28