xref: /openbmc/u-boot/arch/arm/dts/sun6i-a31s-sina31s-core.dtsi (revision cc49e2bdb8fbd47af28cb7e47696322586e9fff1)
1*80e5f83cSHans de Goede/*
2*80e5f83cSHans de Goede * Copyright 2015 Chen-Yu Tsai <wens@csie.org>
3*80e5f83cSHans de Goede *
4*80e5f83cSHans de Goede * This file is dual-licensed: you can use it either under the terms
5*80e5f83cSHans de Goede * of the GPL or the X11 license, at your option. Note that this dual
6*80e5f83cSHans de Goede * licensing only applies to this file, and not this project as a
7*80e5f83cSHans de Goede * whole.
8*80e5f83cSHans de Goede *
9*80e5f83cSHans de Goede *  a) This file is free software; you can redistribute it and/or
10*80e5f83cSHans de Goede *     modify it under the terms of the GNU General Public License as
11*80e5f83cSHans de Goede *     published by the Free Software Foundation; either version 2 of the
12*80e5f83cSHans de Goede *     License, or (at your option) any later version.
13*80e5f83cSHans de Goede *
14*80e5f83cSHans de Goede *     This file is distributed in the hope that it will be useful,
15*80e5f83cSHans de Goede *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16*80e5f83cSHans de Goede *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17*80e5f83cSHans de Goede *     GNU General Public License for more details.
18*80e5f83cSHans de Goede *
19*80e5f83cSHans de Goede * Or, alternatively,
20*80e5f83cSHans de Goede *
21*80e5f83cSHans de Goede *  b) Permission is hereby granted, free of charge, to any person
22*80e5f83cSHans de Goede *     obtaining a copy of this software and associated documentation
23*80e5f83cSHans de Goede *     files (the "Software"), to deal in the Software without
24*80e5f83cSHans de Goede *     restriction, including without limitation the rights to use,
25*80e5f83cSHans de Goede *     copy, modify, merge, publish, distribute, sublicense, and/or
26*80e5f83cSHans de Goede *     sell copies of the Software, and to permit persons to whom the
27*80e5f83cSHans de Goede *     Software is furnished to do so, subject to the following
28*80e5f83cSHans de Goede *     conditions:
29*80e5f83cSHans de Goede *
30*80e5f83cSHans de Goede *     The above copyright notice and this permission notice shall be
31*80e5f83cSHans de Goede *     included in all copies or substantial portions of the Software.
32*80e5f83cSHans de Goede *
33*80e5f83cSHans de Goede *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34*80e5f83cSHans de Goede *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35*80e5f83cSHans de Goede *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36*80e5f83cSHans de Goede *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37*80e5f83cSHans de Goede *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38*80e5f83cSHans de Goede *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39*80e5f83cSHans de Goede *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40*80e5f83cSHans de Goede *     OTHER DEALINGS IN THE SOFTWARE.
41*80e5f83cSHans de Goede */
42*80e5f83cSHans de Goede
43*80e5f83cSHans de Goede/dts-v1/;
44*80e5f83cSHans de Goede#include "sun6i-a31s.dtsi"
45*80e5f83cSHans de Goede#include "sunxi-common-regulators.dtsi"
46*80e5f83cSHans de Goede
47*80e5f83cSHans de Goede#include <dt-bindings/gpio/gpio.h>
48*80e5f83cSHans de Goede
49*80e5f83cSHans de Goede/ {
50*80e5f83cSHans de Goede	model = "Sinlinx SinA31s Core Board";
51*80e5f83cSHans de Goede	compatible = "sinlinx,sina31s", "allwinner,sun6i-a31s";
52*80e5f83cSHans de Goede
53*80e5f83cSHans de Goede	aliases {
54*80e5f83cSHans de Goede		serial0 = &uart0;
55*80e5f83cSHans de Goede	};
56*80e5f83cSHans de Goede};
57*80e5f83cSHans de Goede
58*80e5f83cSHans de Goede&cpu0 {
59*80e5f83cSHans de Goede	cpu-supply = <&reg_dcdc3>;
60*80e5f83cSHans de Goede};
61*80e5f83cSHans de Goede
62*80e5f83cSHans de Goede/* eMMC on core board */
63*80e5f83cSHans de Goede&mmc3 {
64*80e5f83cSHans de Goede	pinctrl-names = "default";
65*80e5f83cSHans de Goede	pinctrl-0 = <&mmc3_8bit_emmc_pins>;
66*80e5f83cSHans de Goede	vmmc-supply = <&reg_dcdc1>;
67*80e5f83cSHans de Goede	vqmmc-supply = <&reg_dcdc1>;
68*80e5f83cSHans de Goede	bus-width = <8>;
69*80e5f83cSHans de Goede	non-removable;
70*80e5f83cSHans de Goede	cap-mmc-hw-reset;
71*80e5f83cSHans de Goede	status = "okay";
72*80e5f83cSHans de Goede};
73*80e5f83cSHans de Goede
74*80e5f83cSHans de Goede/* AXP221s PMIC on core board */
75*80e5f83cSHans de Goede&p2wi {
76*80e5f83cSHans de Goede	status = "okay";
77*80e5f83cSHans de Goede
78*80e5f83cSHans de Goede	axp22x: pmic@68 {
79*80e5f83cSHans de Goede		compatible = "x-powers,axp221";
80*80e5f83cSHans de Goede		reg = <0x68>;
81*80e5f83cSHans de Goede		interrupt-parent = <&nmi_intc>;
82*80e5f83cSHans de Goede		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
83*80e5f83cSHans de Goede	};
84*80e5f83cSHans de Goede};
85*80e5f83cSHans de Goede
86*80e5f83cSHans de Goede#include "axp22x.dtsi"
87*80e5f83cSHans de Goede
88*80e5f83cSHans de Goede&reg_aldo3 {
89*80e5f83cSHans de Goede	regulator-always-on;
90*80e5f83cSHans de Goede	regulator-min-microvolt = <2700000>;
91*80e5f83cSHans de Goede	regulator-max-microvolt = <3300000>;
92*80e5f83cSHans de Goede	regulator-name = "avcc";
93*80e5f83cSHans de Goede};
94*80e5f83cSHans de Goede
95*80e5f83cSHans de Goede&reg_dc5ldo {
96*80e5f83cSHans de Goede	regulator-min-microvolt = <700000>;
97*80e5f83cSHans de Goede	regulator-max-microvolt = <1320000>;
98*80e5f83cSHans de Goede	regulator-name = "vdd-cpus";
99*80e5f83cSHans de Goede};
100*80e5f83cSHans de Goede
101*80e5f83cSHans de Goede&reg_dcdc1 {
102*80e5f83cSHans de Goede	regulator-always-on;
103*80e5f83cSHans de Goede	regulator-min-microvolt = <3000000>;
104*80e5f83cSHans de Goede	regulator-max-microvolt = <3000000>;
105*80e5f83cSHans de Goede	regulator-name = "vcc-3v0";
106*80e5f83cSHans de Goede};
107*80e5f83cSHans de Goede
108*80e5f83cSHans de Goede&reg_dcdc2 {
109*80e5f83cSHans de Goede	regulator-min-microvolt = <700000>;
110*80e5f83cSHans de Goede	regulator-max-microvolt = <1320000>;
111*80e5f83cSHans de Goede	regulator-name = "vdd-gpu";
112*80e5f83cSHans de Goede};
113*80e5f83cSHans de Goede
114*80e5f83cSHans de Goede&reg_dcdc3 {
115*80e5f83cSHans de Goede	regulator-always-on;
116*80e5f83cSHans de Goede	regulator-min-microvolt = <700000>;
117*80e5f83cSHans de Goede	regulator-max-microvolt = <1320000>;
118*80e5f83cSHans de Goede	regulator-name = "vdd-cpu";
119*80e5f83cSHans de Goede};
120*80e5f83cSHans de Goede
121*80e5f83cSHans de Goede&reg_dcdc4 {
122*80e5f83cSHans de Goede	regulator-always-on;
123*80e5f83cSHans de Goede	regulator-min-microvolt = <700000>;
124*80e5f83cSHans de Goede	regulator-max-microvolt = <1320000>;
125*80e5f83cSHans de Goede	regulator-name = "vdd-sys-dll";
126*80e5f83cSHans de Goede};
127*80e5f83cSHans de Goede
128*80e5f83cSHans de Goede&reg_dcdc5 {
129*80e5f83cSHans de Goede	regulator-always-on;
130*80e5f83cSHans de Goede	regulator-min-microvolt = <1500000>;
131*80e5f83cSHans de Goede	regulator-max-microvolt = <1500000>;
132*80e5f83cSHans de Goede	regulator-name = "vcc-dram";
133*80e5f83cSHans de Goede};
134*80e5f83cSHans de Goede
135*80e5f83cSHans de Goede/* UART0 pads available on core board */
136*80e5f83cSHans de Goede&uart0 {
137*80e5f83cSHans de Goede	pinctrl-names = "default";
138*80e5f83cSHans de Goede	pinctrl-0 = <&uart0_pins_a>;
139*80e5f83cSHans de Goede	status = "okay";
140*80e5f83cSHans de Goede};
141*80e5f83cSHans de Goede
142