183d290c5STom Rini// SPDX-License-Identifier: GPL-2.0+ 26bd041f0SDalon Westergreen/* 36bd041f0SDalon Westergreen * Copyright (C) 2017, Intel Corporation 46bd041f0SDalon Westergreen * 56bd041f0SDalon Westergreen * based on socfpga_cyclone5_de0_nano_soc.dts 66bd041f0SDalon Westergreen */ 76bd041f0SDalon Westergreen 86bd041f0SDalon Westergreen#include "socfpga_cyclone5.dtsi" 96bd041f0SDalon Westergreen 106bd041f0SDalon Westergreen/ { 116bd041f0SDalon Westergreen model = "Terasic DE10-Nano"; 126bd041f0SDalon Westergreen compatible = "altr,socfpga-cyclone5", "altr,socfpga"; 136bd041f0SDalon Westergreen 146bd041f0SDalon Westergreen chosen { 156bd041f0SDalon Westergreen bootargs = "console=ttyS0,115200"; 1679a436d5SSimon Goldschmidt stdout-path = "serial0:115200n8"; 176bd041f0SDalon Westergreen }; 186bd041f0SDalon Westergreen 196bd041f0SDalon Westergreen aliases { 206bd041f0SDalon Westergreen ethernet0 = &gmac1; 216bd041f0SDalon Westergreen udc0 = &usb1; 226bd041f0SDalon Westergreen }; 236bd041f0SDalon Westergreen 246bd041f0SDalon Westergreen memory { 256bd041f0SDalon Westergreen name = "memory"; 266bd041f0SDalon Westergreen device_type = "memory"; 276bd041f0SDalon Westergreen reg = <0x0 0x40000000>; /* 1GB */ 286bd041f0SDalon Westergreen }; 296bd041f0SDalon Westergreen 306bd041f0SDalon Westergreen soc { 316bd041f0SDalon Westergreen u-boot,dm-pre-reloc; 326bd041f0SDalon Westergreen }; 336bd041f0SDalon Westergreen}; 346bd041f0SDalon Westergreen 356bd041f0SDalon Westergreen&gmac1 { 366bd041f0SDalon Westergreen status = "okay"; 376bd041f0SDalon Westergreen phy-mode = "rgmii"; 386bd041f0SDalon Westergreen 396bd041f0SDalon Westergreen rxd0-skew-ps = <420>; 406bd041f0SDalon Westergreen rxd1-skew-ps = <420>; 416bd041f0SDalon Westergreen rxd2-skew-ps = <420>; 426bd041f0SDalon Westergreen rxd3-skew-ps = <420>; 436bd041f0SDalon Westergreen txen-skew-ps = <0>; 446bd041f0SDalon Westergreen txc-skew-ps = <1860>; 456bd041f0SDalon Westergreen rxdv-skew-ps = <420>; 466bd041f0SDalon Westergreen rxc-skew-ps = <1680>; 476bd041f0SDalon Westergreen}; 486bd041f0SDalon Westergreen 496bd041f0SDalon Westergreen&gpio0 { 506bd041f0SDalon Westergreen status = "okay"; 516bd041f0SDalon Westergreen}; 526bd041f0SDalon Westergreen 536bd041f0SDalon Westergreen&gpio1 { 546bd041f0SDalon Westergreen status = "okay"; 556bd041f0SDalon Westergreen}; 566bd041f0SDalon Westergreen 576bd041f0SDalon Westergreen&gpio2 { 586bd041f0SDalon Westergreen status = "okay"; 596bd041f0SDalon Westergreen}; 606bd041f0SDalon Westergreen 61*c402e817SSimon Goldschmidt&porta { 62*c402e817SSimon Goldschmidt bank-name = "porta"; 63*c402e817SSimon Goldschmidt}; 64*c402e817SSimon Goldschmidt 65*c402e817SSimon Goldschmidt&portb { 66*c402e817SSimon Goldschmidt bank-name = "portb"; 67*c402e817SSimon Goldschmidt}; 68*c402e817SSimon Goldschmidt 69*c402e817SSimon Goldschmidt&portc { 70*c402e817SSimon Goldschmidt bank-name = "portc"; 71*c402e817SSimon Goldschmidt}; 72*c402e817SSimon Goldschmidt 736bd041f0SDalon Westergreen&mmc0 { 746bd041f0SDalon Westergreen status = "okay"; 756bd041f0SDalon Westergreen u-boot,dm-pre-reloc; 766bd041f0SDalon Westergreen}; 776bd041f0SDalon Westergreen 786bd041f0SDalon Westergreen&usb1 { 796bd041f0SDalon Westergreen status = "okay"; 806bd041f0SDalon Westergreen}; 8179a436d5SSimon Goldschmidt 8279a436d5SSimon Goldschmidt&uart0 { 8379a436d5SSimon Goldschmidt u-boot,dm-pre-reloc; 8479a436d5SSimon Goldschmidt}; 85*c402e817SSimon Goldschmidt 86*c402e817SSimon Goldschmidt&watchdog0 { 87*c402e817SSimon Goldschmidt status = "disabled"; 88*c402e817SSimon Goldschmidt}; 89