xref: /openbmc/u-boot/arch/arm/dts/rk3288-evb.dtsi (revision d597b26d5132643118333b2372757fb402ba0579)
1*4549e789STom Rini// SPDX-License-Identifier: GPL-2.0+ OR X11
2744368d6SXu Ziyuan/*
3744368d6SXu Ziyuan * (C) Copyright 2016 Rockchip Electronics Co., Ltd
4744368d6SXu Ziyuan */
5744368d6SXu Ziyuan
6744368d6SXu Ziyuan#include "rk3288.dtsi"
7744368d6SXu Ziyuan
8744368d6SXu Ziyuan/ {
9744368d6SXu Ziyuan	memory {
10744368d6SXu Ziyuan		reg = <0 0x80000000>;
11744368d6SXu Ziyuan	};
12744368d6SXu Ziyuan
13ee4bc340SJacob Chen	ext_gmac: external-gmac-clock {
14ee4bc340SJacob Chen		compatible = "fixed-clock";
15ee4bc340SJacob Chen		#clock-cells = <0>;
16ee4bc340SJacob Chen		clock-frequency = <125000000>;
17ee4bc340SJacob Chen		clock-output-names = "ext_gmac";
18ee4bc340SJacob Chen	};
19ee4bc340SJacob Chen
20744368d6SXu Ziyuan	keys: gpio-keys {
21744368d6SXu Ziyuan		compatible = "gpio-keys";
22744368d6SXu Ziyuan
23744368d6SXu Ziyuan		button@0 {
24744368d6SXu Ziyuan			gpio-key,wakeup = <1>;
25744368d6SXu Ziyuan			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
26744368d6SXu Ziyuan			label = "GPIO Power";
27744368d6SXu Ziyuan			linux,code = <116>;
28744368d6SXu Ziyuan			pinctrl-names = "default";
29744368d6SXu Ziyuan			pinctrl-0 = <&pwr_key>;
30744368d6SXu Ziyuan		};
31744368d6SXu Ziyuan	};
32744368d6SXu Ziyuan
33744368d6SXu Ziyuan	vcc_sys: vsys-regulator {
34744368d6SXu Ziyuan		compatible = "regulator-fixed";
35744368d6SXu Ziyuan		regulator-name = "vcc_sys";
36744368d6SXu Ziyuan		regulator-min-microvolt = <5000000>;
37744368d6SXu Ziyuan		regulator-max-microvolt = <5000000>;
38744368d6SXu Ziyuan		regulator-always-on;
39744368d6SXu Ziyuan		regulator-boot-on;
40744368d6SXu Ziyuan	};
41744368d6SXu Ziyuan
42744368d6SXu Ziyuan	vcc_flash: flash-regulator {
43744368d6SXu Ziyuan		compatible = "regulator-fixed";
44744368d6SXu Ziyuan		regulator-name = "vcc_flash";
45744368d6SXu Ziyuan		regulator-min-microvolt = <1800000>;
46744368d6SXu Ziyuan		regulator-max-microvolt = <1800000>;
47744368d6SXu Ziyuan		vin-supply = <&vcc_io>;
48744368d6SXu Ziyuan	};
49744368d6SXu Ziyuan
50744368d6SXu Ziyuan	vcc_5v: usb-regulator {
51744368d6SXu Ziyuan		compatible = "regulator-fixed";
52744368d6SXu Ziyuan		regulator-name = "vcc_5v";
53744368d6SXu Ziyuan		regulator-min-microvolt = <5000000>;
54744368d6SXu Ziyuan		regulator-max-microvolt = <5000000>;
55744368d6SXu Ziyuan		regulator-always-on;
56744368d6SXu Ziyuan		regulator-boot-on;
57744368d6SXu Ziyuan		vin-supply = <&vcc_sys>;
58744368d6SXu Ziyuan	};
59744368d6SXu Ziyuan
60744368d6SXu Ziyuan	vcc_host_5v: usb-host-regulator {
61744368d6SXu Ziyuan		compatible = "regulator-fixed";
62744368d6SXu Ziyuan		enable-active-high;
63744368d6SXu Ziyuan		gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
64744368d6SXu Ziyuan		pinctrl-names = "default";
65744368d6SXu Ziyuan		pinctrl-0 = <&host_vbus_drv>;
66744368d6SXu Ziyuan		regulator-name = "vcc_host_5v";
67744368d6SXu Ziyuan		regulator-min-microvolt = <5000000>;
68744368d6SXu Ziyuan		regulator-max-microvolt = <5000000>;
69744368d6SXu Ziyuan		regulator-always-on;
70744368d6SXu Ziyuan		vin-supply = <&vcc_5v>;
71744368d6SXu Ziyuan	};
72744368d6SXu Ziyuan
73744368d6SXu Ziyuan	vcc_otg_5v: usb-otg-regulator {
74744368d6SXu Ziyuan		compatible = "regulator-fixed";
75744368d6SXu Ziyuan		enable-active-high;
76744368d6SXu Ziyuan		gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
77744368d6SXu Ziyuan		pinctrl-names = "default";
78744368d6SXu Ziyuan		pinctrl-0 = <&otg_vbus_drv>;
79744368d6SXu Ziyuan		regulator-name = "vcc_otg_5v";
80744368d6SXu Ziyuan		regulator-min-microvolt = <5000000>;
81744368d6SXu Ziyuan		regulator-max-microvolt = <5000000>;
82744368d6SXu Ziyuan		regulator-always-on;
83744368d6SXu Ziyuan		vin-supply = <&vcc_5v>;
84744368d6SXu Ziyuan	};
852085de57SEric Gao
862085de57SEric Gao	backlight: backlight {
872085de57SEric Gao		compatible = "pwm-backlight";
882085de57SEric Gao		power-supply = <&vcc_sys>;
892085de57SEric Gao		enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
902085de57SEric Gao		brightness-levels = <
912085de57SEric Gao			  0   1   2   3   4   5   6   7
922085de57SEric Gao			  8   9  10  11  12  13  14  15
932085de57SEric Gao			 16  17  18  19  20  21  22  23
942085de57SEric Gao			 24  25  26  27  28  29  30  31
952085de57SEric Gao			 32  33  34  35  36  37  38  39
962085de57SEric Gao			 40  41  42  43  44  45  46  47
972085de57SEric Gao			 48  49  50  51  52  53  54  55
982085de57SEric Gao			 56  57  58  59  60  61  62  63
992085de57SEric Gao			 64  65  66  67  68  69  70  71
1002085de57SEric Gao			 72  73  74  75  76  77  78  79
1012085de57SEric Gao			 80  81  82  83  84  85  86  87
1022085de57SEric Gao			 88  89  90  91  92  93  94  95
1032085de57SEric Gao			 96  97  98  99 100 101 102 103
1042085de57SEric Gao			104 105 106 107 108 109 110 111
1052085de57SEric Gao			112 113 114 115 116 117 118 119
1062085de57SEric Gao			120 121 122 123 124 125 126 127
1072085de57SEric Gao			128 129 130 131 132 133 134 135
1082085de57SEric Gao			136 137 138 139 140 141 142 143
1092085de57SEric Gao			144 145 146 147 148 149 150 151
1102085de57SEric Gao			152 153 154 155 156 157 158 159
1112085de57SEric Gao			160 161 162 163 164 165 166 167
1122085de57SEric Gao			168 169 170 171 172 173 174 175
1132085de57SEric Gao			176 177 178 179 180 181 182 183
1142085de57SEric Gao			184 185 186 187 188 189 190 191
1152085de57SEric Gao			192 193 194 195 196 197 198 199
1162085de57SEric Gao			200 201 202 203 204 205 206 207
1172085de57SEric Gao			208 209 210 211 212 213 214 215
1182085de57SEric Gao			216 217 218 219 220 221 222 223
1192085de57SEric Gao			224 225 226 227 228 229 230 231
1202085de57SEric Gao			232 233 234 235 236 237 238 239
1212085de57SEric Gao			240 241 242 243 244 245 246 247
1222085de57SEric Gao			248 249 250 251 252 253 254 255>;
1232085de57SEric Gao		default-brightness-level = <50>;
1242085de57SEric Gao		pwms = <&pwm0 0 25000 0>;
1252085de57SEric Gao		pinctrl-names = "default";
1262085de57SEric Gao		pinctrl-0 = <&pwm0_pin>;
1272085de57SEric Gao		pwm-delay-us = <10000>;
1282085de57SEric Gao		status = "disabled";
1292085de57SEric Gao	};
1302085de57SEric Gao
1312085de57SEric Gao	panel: panel {
1322085de57SEric Gao		compatible = "simple-panel";
1332085de57SEric Gao		power-supply = <&vcc_io>;
1342085de57SEric Gao		backlight = <&backlight>;
1352085de57SEric Gao		enable-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
1362085de57SEric Gao		status = "disabled";
1372085de57SEric Gao	};
138744368d6SXu Ziyuan};
139744368d6SXu Ziyuan
140744368d6SXu Ziyuan&cpu0 {
141744368d6SXu Ziyuan	cpu0-supply = <&vdd_cpu>;
142744368d6SXu Ziyuan};
143744368d6SXu Ziyuan
144744368d6SXu Ziyuan&emmc {
145744368d6SXu Ziyuan	broken-cd;
146744368d6SXu Ziyuan	bus-width = <8>;
147744368d6SXu Ziyuan	cap-mmc-highspeed;
148744368d6SXu Ziyuan	disable-wp;
149744368d6SXu Ziyuan	non-removable;
150744368d6SXu Ziyuan	num-slots = <1>;
151744368d6SXu Ziyuan	pinctrl-names = "default";
152744368d6SXu Ziyuan	pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
153744368d6SXu Ziyuan	status = "okay";
154744368d6SXu Ziyuan};
155744368d6SXu Ziyuan
156ee4bc340SJacob Chen&gmac {
157ee4bc340SJacob Chen	phy-mode = "rgmii";
158ee4bc340SJacob Chen	clock_in_out = "input";
159ee4bc340SJacob Chen	snps,reset-gpio = <&gpio4 7 0>;
160ee4bc340SJacob Chen	snps,reset-active-low;
161ee4bc340SJacob Chen	snps,reset-delays-us = <0 10000 1000000>;
162ee4bc340SJacob Chen	assigned-clocks = <&cru SCLK_MAC>;
163ee4bc340SJacob Chen	assigned-clock-parents = <&ext_gmac>;
164ee4bc340SJacob Chen	pinctrl-names = "default";
165ee4bc340SJacob Chen	pinctrl-0 = <&rgmii_pins>;
166ee4bc340SJacob Chen	tx_delay = <0x30>;
167ee4bc340SJacob Chen	rx_delay = <0x10>;
168ee4bc340SJacob Chen	status = "okay";
169ee4bc340SJacob Chen};
170ee4bc340SJacob Chen
171744368d6SXu Ziyuan&hdmi {
172744368d6SXu Ziyuan	ddc-i2c-bus = <&i2c5>;
173744368d6SXu Ziyuan	status = "okay";
174744368d6SXu Ziyuan};
175744368d6SXu Ziyuan
176744368d6SXu Ziyuan&i2c0 {
177744368d6SXu Ziyuan	clock-frequency = <400000>;
178744368d6SXu Ziyuan	status = "okay";
179744368d6SXu Ziyuan
180744368d6SXu Ziyuan	vdd_cpu: syr827@40 {
181744368d6SXu Ziyuan		compatible = "silergy,syr827";
182744368d6SXu Ziyuan		fcs,suspend-voltage-selector = <1>;
183744368d6SXu Ziyuan		reg = <0x40>;
184744368d6SXu Ziyuan		regulator-name = "vdd_cpu";
185744368d6SXu Ziyuan		regulator-min-microvolt = <850000>;
186744368d6SXu Ziyuan		regulator-max-microvolt = <1350000>;
187744368d6SXu Ziyuan		regulator-always-on;
188744368d6SXu Ziyuan		regulator-boot-on;
189744368d6SXu Ziyuan		vin-supply = <&vcc_sys>;
190744368d6SXu Ziyuan	};
191744368d6SXu Ziyuan
192744368d6SXu Ziyuan	vdd_gpu: syr828@41 {
193744368d6SXu Ziyuan		compatible = "silergy,syr828";
194744368d6SXu Ziyuan		fcs,suspend-voltage-selector = <1>;
195744368d6SXu Ziyuan		reg = <0x41>;
196744368d6SXu Ziyuan		regulator-name = "vdd_gpu";
197744368d6SXu Ziyuan		regulator-min-microvolt = <850000>;
198744368d6SXu Ziyuan		regulator-max-microvolt = <1350000>;
199744368d6SXu Ziyuan		regulator-always-on;
200744368d6SXu Ziyuan		vin-supply = <&vcc_sys>;
201744368d6SXu Ziyuan	};
202744368d6SXu Ziyuan
203744368d6SXu Ziyuan	hym8563: hym8563@51 {
204744368d6SXu Ziyuan		compatible = "haoyu,hym8563";
205744368d6SXu Ziyuan		reg = <0x51>;
206744368d6SXu Ziyuan		#clock-cells = <0>;
207744368d6SXu Ziyuan		clock-frequency = <32768>;
208744368d6SXu Ziyuan		clock-output-names = "xin32k";
209744368d6SXu Ziyuan		interrupt-parent = <&gpio7>;
210744368d6SXu Ziyuan		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
211744368d6SXu Ziyuan		pinctrl-names = "default";
212744368d6SXu Ziyuan		pinctrl-0 = <&rtc_int>;
213744368d6SXu Ziyuan	};
214744368d6SXu Ziyuan
215744368d6SXu Ziyuan	act8846: act8846@5a {
216744368d6SXu Ziyuan		compatible = "active-semi,act8846";
217744368d6SXu Ziyuan		reg = <0x5a>;
218744368d6SXu Ziyuan		pinctrl-names = "default";
219744368d6SXu Ziyuan		pinctrl-0 = <&pwr_hold>;
220744368d6SXu Ziyuan		system-power-controller;
221744368d6SXu Ziyuan
222744368d6SXu Ziyuan		regulators {
223744368d6SXu Ziyuan			vcc_ddr: REG1 {
224744368d6SXu Ziyuan				regulator-name = "vcc_ddr";
225744368d6SXu Ziyuan				regulator-min-microvolt = <1200000>;
226744368d6SXu Ziyuan				regulator-max-microvolt = <1200000>;
227744368d6SXu Ziyuan				regulator-always-on;
228744368d6SXu Ziyuan			};
229744368d6SXu Ziyuan
230744368d6SXu Ziyuan			vcc_io: REG2 {
231744368d6SXu Ziyuan				regulator-name = "vcc_io";
232744368d6SXu Ziyuan				regulator-min-microvolt = <3300000>;
233744368d6SXu Ziyuan				regulator-max-microvolt = <3300000>;
234744368d6SXu Ziyuan				regulator-always-on;
235744368d6SXu Ziyuan			};
236744368d6SXu Ziyuan
237744368d6SXu Ziyuan			vdd_log: REG3 {
238744368d6SXu Ziyuan				regulator-name = "vdd_log";
239744368d6SXu Ziyuan				regulator-min-microvolt = <1100000>;
240744368d6SXu Ziyuan				regulator-max-microvolt = <1100000>;
241744368d6SXu Ziyuan				regulator-always-on;
242744368d6SXu Ziyuan			};
243744368d6SXu Ziyuan
244744368d6SXu Ziyuan			vcc_20: REG4 {
245744368d6SXu Ziyuan				regulator-name = "vcc_20";
246744368d6SXu Ziyuan				regulator-min-microvolt = <2000000>;
247744368d6SXu Ziyuan				regulator-max-microvolt = <2000000>;
248744368d6SXu Ziyuan				regulator-always-on;
249744368d6SXu Ziyuan			};
250744368d6SXu Ziyuan
251744368d6SXu Ziyuan			vccio_sd: REG5 {
252744368d6SXu Ziyuan				regulator-name = "vccio_sd";
253744368d6SXu Ziyuan				regulator-min-microvolt = <3300000>;
254744368d6SXu Ziyuan				regulator-max-microvolt = <3300000>;
255744368d6SXu Ziyuan				regulator-always-on;
256744368d6SXu Ziyuan			};
257744368d6SXu Ziyuan
258744368d6SXu Ziyuan			vdd10_lcd: REG6 {
259744368d6SXu Ziyuan				regulator-name = "vdd10_lcd";
260744368d6SXu Ziyuan				regulator-min-microvolt = <1000000>;
261744368d6SXu Ziyuan				regulator-max-microvolt = <1000000>;
262744368d6SXu Ziyuan				regulator-always-on;
263744368d6SXu Ziyuan			};
264744368d6SXu Ziyuan
265744368d6SXu Ziyuan			vcca_codec: REG7 {
266744368d6SXu Ziyuan				regulator-name = "vcca_codec";
267744368d6SXu Ziyuan				regulator-min-microvolt = <3300000>;
268744368d6SXu Ziyuan				regulator-max-microvolt = <3300000>;
269744368d6SXu Ziyuan			};
270744368d6SXu Ziyuan
271744368d6SXu Ziyuan			vcc_tp: REG8 {
272744368d6SXu Ziyuan				regulator-name = "vcca_33";
273744368d6SXu Ziyuan				regulator-min-microvolt = <3300000>;
274744368d6SXu Ziyuan				regulator-max-microvolt = <3300000>;
275744368d6SXu Ziyuan			};
276744368d6SXu Ziyuan
277744368d6SXu Ziyuan			vccio_pmu: REG9 {
278744368d6SXu Ziyuan				regulator-name = "vccio_pmu";
279744368d6SXu Ziyuan				regulator-min-microvolt = <3300000>;
280744368d6SXu Ziyuan				regulator-max-microvolt = <3300000>;
281744368d6SXu Ziyuan			};
282744368d6SXu Ziyuan
283744368d6SXu Ziyuan			vdd_10: REG10 {
284744368d6SXu Ziyuan				regulator-name = "vdd_10";
285744368d6SXu Ziyuan				regulator-min-microvolt = <1000000>;
286744368d6SXu Ziyuan				regulator-max-microvolt = <1000000>;
287744368d6SXu Ziyuan				regulator-always-on;
288744368d6SXu Ziyuan			};
289744368d6SXu Ziyuan
290744368d6SXu Ziyuan			vcc_18: REG11 {
291744368d6SXu Ziyuan				regulator-name = "vcc_18";
292744368d6SXu Ziyuan				regulator-min-microvolt = <1800000>;
293744368d6SXu Ziyuan				regulator-max-microvolt = <1800000>;
294744368d6SXu Ziyuan				regulator-always-on;
295744368d6SXu Ziyuan			};
296744368d6SXu Ziyuan
297744368d6SXu Ziyuan			vcc18_lcd: REG12 {
298744368d6SXu Ziyuan				regulator-name = "vcc18_lcd";
299744368d6SXu Ziyuan				regulator-min-microvolt = <1800000>;
300744368d6SXu Ziyuan				regulator-max-microvolt = <1800000>;
301744368d6SXu Ziyuan				regulator-always-on;
302744368d6SXu Ziyuan			};
303744368d6SXu Ziyuan		};
304744368d6SXu Ziyuan	};
305744368d6SXu Ziyuan};
306744368d6SXu Ziyuan
307744368d6SXu Ziyuan&i2c1 {
308744368d6SXu Ziyuan	status = "okay";
309744368d6SXu Ziyuan};
310744368d6SXu Ziyuan
311744368d6SXu Ziyuan&i2c2 {
312744368d6SXu Ziyuan	status = "okay";
313744368d6SXu Ziyuan};
314744368d6SXu Ziyuan
315744368d6SXu Ziyuan&i2c4 {
316744368d6SXu Ziyuan	status = "okay";
317744368d6SXu Ziyuan};
318744368d6SXu Ziyuan
319744368d6SXu Ziyuan&i2c5 {
320744368d6SXu Ziyuan	status = "okay";
321744368d6SXu Ziyuan};
322744368d6SXu Ziyuan
323744368d6SXu Ziyuan&pinctrl {
324744368d6SXu Ziyuan	pcfg_output_high: pcfg-output-high {
325744368d6SXu Ziyuan		output-high;
326744368d6SXu Ziyuan	};
327744368d6SXu Ziyuan
328744368d6SXu Ziyuan	pcfg_output_low: pcfg-output-low {
329744368d6SXu Ziyuan		output-low;
330744368d6SXu Ziyuan	};
331744368d6SXu Ziyuan
332744368d6SXu Ziyuan	act8846 {
333744368d6SXu Ziyuan		pwr_hold: pwr-hold {
334744368d6SXu Ziyuan			rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_output_high>;
335744368d6SXu Ziyuan		};
336744368d6SXu Ziyuan	};
337744368d6SXu Ziyuan
338744368d6SXu Ziyuan	hym8563 {
339744368d6SXu Ziyuan		rtc_int: rtc-int {
340744368d6SXu Ziyuan			rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
341744368d6SXu Ziyuan		};
342744368d6SXu Ziyuan	};
343744368d6SXu Ziyuan
344744368d6SXu Ziyuan	keys {
345744368d6SXu Ziyuan		pwr_key: pwr-key {
346744368d6SXu Ziyuan			rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
347744368d6SXu Ziyuan		};
348744368d6SXu Ziyuan	};
349744368d6SXu Ziyuan
350744368d6SXu Ziyuan	sdmmc {
351744368d6SXu Ziyuan		sdmmc_pwr: sdmmc-pwr {
352744368d6SXu Ziyuan			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
353744368d6SXu Ziyuan		};
354744368d6SXu Ziyuan	};
355744368d6SXu Ziyuan
356744368d6SXu Ziyuan	usb_host {
357744368d6SXu Ziyuan		host_vbus_drv: host-vbus-drv {
358744368d6SXu Ziyuan			rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
359744368d6SXu Ziyuan		};
360744368d6SXu Ziyuan	};
361744368d6SXu Ziyuan
362744368d6SXu Ziyuan	usb_otg {
363744368d6SXu Ziyuan		otg_vbus_drv: otg-vbus-drv {
364744368d6SXu Ziyuan			rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
365744368d6SXu Ziyuan		};
366744368d6SXu Ziyuan	};
367744368d6SXu Ziyuan};
368744368d6SXu Ziyuan
3692085de57SEric Gao&pwm0 {
3702085de57SEric Gao	status = "okay";
3712085de57SEric Gao};
3722085de57SEric Gao
373744368d6SXu Ziyuan&saradc {
374744368d6SXu Ziyuan	vref-supply = <&vcc_18>;
375744368d6SXu Ziyuan	status = "okay";
376744368d6SXu Ziyuan};
377744368d6SXu Ziyuan
378744368d6SXu Ziyuan&sdio0 {
379744368d6SXu Ziyuan	broken-cd;
380744368d6SXu Ziyuan	bus-width = <4>;
381744368d6SXu Ziyuan	disable-wp;
382744368d6SXu Ziyuan	non-removable;
383744368d6SXu Ziyuan	num-slots = <1>;
384744368d6SXu Ziyuan	pinctrl-names = "default";
385744368d6SXu Ziyuan	pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>;
386744368d6SXu Ziyuan	vmmc-supply = <&vcc_18>;
387744368d6SXu Ziyuan	status = "disabled";
388744368d6SXu Ziyuan};
389744368d6SXu Ziyuan
390744368d6SXu Ziyuan&sdmmc {
391744368d6SXu Ziyuan	bus-width = <4>;
392744368d6SXu Ziyuan	cap-mmc-highspeed;
393744368d6SXu Ziyuan	cap-sd-highspeed;
394744368d6SXu Ziyuan	card-detect-delay = <200>;
395744368d6SXu Ziyuan	disable-wp;
396744368d6SXu Ziyuan	num-slots = <1>;
397744368d6SXu Ziyuan	pinctrl-names = "default";
398744368d6SXu Ziyuan	pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
399744368d6SXu Ziyuan	vmmc-supply = <&vccio_sd>;
400744368d6SXu Ziyuan	status = "okay";
401744368d6SXu Ziyuan};
402744368d6SXu Ziyuan
403744368d6SXu Ziyuan&spi0 {
404744368d6SXu Ziyuan	pinctrl-names = "default";
405744368d6SXu Ziyuan	pinctrl-0 = <&spi0_clk>, <&spi0_cs0>, <&spi0_tx>, <&spi0_rx>, <&spi0_cs1>;
406744368d6SXu Ziyuan	status = "okay";
407744368d6SXu Ziyuan};
408744368d6SXu Ziyuan
409744368d6SXu Ziyuan&uart0 {
410744368d6SXu Ziyuan	pinctrl-names = "default";
411744368d6SXu Ziyuan	pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
412744368d6SXu Ziyuan	status = "okay";
413744368d6SXu Ziyuan};
414744368d6SXu Ziyuan
415744368d6SXu Ziyuan&uart1 {
416744368d6SXu Ziyuan	status = "okay";
417744368d6SXu Ziyuan};
418744368d6SXu Ziyuan
419744368d6SXu Ziyuan&uart2 {
420744368d6SXu Ziyuan	status = "okay";
421744368d6SXu Ziyuan};
422744368d6SXu Ziyuan
423744368d6SXu Ziyuan&uart3 {
424744368d6SXu Ziyuan	status = "okay";
425744368d6SXu Ziyuan};
426744368d6SXu Ziyuan
427744368d6SXu Ziyuan&usb_host1 {
428744368d6SXu Ziyuan	status = "okay";
429744368d6SXu Ziyuan};
430744368d6SXu Ziyuan
431744368d6SXu Ziyuan&usb_otg {
432744368d6SXu Ziyuan	status = "okay";
433744368d6SXu Ziyuan};
434744368d6SXu Ziyuan
435744368d6SXu Ziyuan&vopb {
436744368d6SXu Ziyuan	status = "okay";
437744368d6SXu Ziyuan};
438744368d6SXu Ziyuan
439744368d6SXu Ziyuan&vopb_mmu {
440744368d6SXu Ziyuan	status = "okay";
441744368d6SXu Ziyuan};
442744368d6SXu Ziyuan
443744368d6SXu Ziyuan&vopl {
444744368d6SXu Ziyuan	status = "okay";
445744368d6SXu Ziyuan};
446744368d6SXu Ziyuan
447744368d6SXu Ziyuan&vopl_mmu {
448744368d6SXu Ziyuan	status = "okay";
449744368d6SXu Ziyuan};
450744368d6SXu Ziyuan
4512085de57SEric Gao&mipi_dsi0 {
4522085de57SEric Gao	status = "disabled";
4532085de57SEric Gao	rockchip,panel = <&panel>;
4542085de57SEric Gao	display-timings {
4552085de57SEric Gao		timing0 {
4562085de57SEric Gao		bits-per-pixel = <24>;
4572085de57SEric Gao		clock-frequency = <160000000>;
4582085de57SEric Gao		hfront-porch = <120>;
4592085de57SEric Gao		hsync-len = <20>;
4602085de57SEric Gao		hback-porch = <21>;
4612085de57SEric Gao		hactive = <1200>;
4622085de57SEric Gao		vfront-porch = <21>;
4632085de57SEric Gao		vsync-len = <3>;
4642085de57SEric Gao		vback-porch = <18>;
4652085de57SEric Gao		vactive = <1920>;
4662085de57SEric Gao		hsync-active = <0>;
4672085de57SEric Gao		vsync-active = <0>;
4682085de57SEric Gao		de-active = <1>;
4692085de57SEric Gao		pixelclk-active = <0>;
4702085de57SEric Gao		};
4712085de57SEric Gao	};
4722085de57SEric Gao};
4732085de57SEric Gao
474744368d6SXu Ziyuan&wdt {
475744368d6SXu Ziyuan	status = "okay";
476744368d6SXu Ziyuan};
477