14157c472SMarek Vasut/* 24157c472SMarek Vasut * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board 34157c472SMarek Vasut * 44157c472SMarek Vasut * Copyright (C) 2016 Renesas Electronics Corp. 54157c472SMarek Vasut * Copyright (C) 2016 Cogent Embedded, Inc. 64157c472SMarek Vasut * 7*62b2bb53SMarek Vasut * SPDX-License-Identifier: GPL-2.0 84157c472SMarek Vasut */ 94157c472SMarek Vasut 104157c472SMarek Vasut/dts-v1/; 114157c472SMarek Vasut#include "r8a7795.dtsi" 1237a79081SMarek Vasut#include "ulcb.dtsi" 134157c472SMarek Vasut 144157c472SMarek Vasut/ { 1537a79081SMarek Vasut model = "Renesas H3ULCB board based on r8a7795 ES2.0+"; 164157c472SMarek Vasut compatible = "renesas,h3ulcb", "renesas,r8a7795"; 174157c472SMarek Vasut 184157c472SMarek Vasut memory@48000000 { 194157c472SMarek Vasut device_type = "memory"; 204157c472SMarek Vasut /* first 128MB is reserved for secure area. */ 214157c472SMarek Vasut reg = <0x0 0x48000000 0x0 0x38000000>; 224157c472SMarek Vasut }; 234157c472SMarek Vasut 244157c472SMarek Vasut memory@500000000 { 254157c472SMarek Vasut device_type = "memory"; 264157c472SMarek Vasut reg = <0x5 0x00000000 0x0 0x40000000>; 274157c472SMarek Vasut }; 284157c472SMarek Vasut 294157c472SMarek Vasut memory@600000000 { 304157c472SMarek Vasut device_type = "memory"; 314157c472SMarek Vasut reg = <0x6 0x00000000 0x0 0x40000000>; 324157c472SMarek Vasut }; 334157c472SMarek Vasut 344157c472SMarek Vasut memory@700000000 { 354157c472SMarek Vasut device_type = "memory"; 364157c472SMarek Vasut reg = <0x7 0x00000000 0x0 0x40000000>; 374157c472SMarek Vasut }; 384157c472SMarek Vasut}; 39*62b2bb53SMarek Vasut 40*62b2bb53SMarek Vasut&du { 41*62b2bb53SMarek Vasut clocks = <&cpg CPG_MOD 724>, 42*62b2bb53SMarek Vasut <&cpg CPG_MOD 723>, 43*62b2bb53SMarek Vasut <&cpg CPG_MOD 722>, 44*62b2bb53SMarek Vasut <&cpg CPG_MOD 721>, 45*62b2bb53SMarek Vasut <&cpg CPG_MOD 727>, 46*62b2bb53SMarek Vasut <&versaclock5 1>, 47*62b2bb53SMarek Vasut <&versaclock5 3>, 48*62b2bb53SMarek Vasut <&versaclock5 4>, 49*62b2bb53SMarek Vasut <&versaclock5 2>; 50*62b2bb53SMarek Vasut clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0", 51*62b2bb53SMarek Vasut "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3"; 52*62b2bb53SMarek Vasut}; 53