xref: /openbmc/u-boot/arch/arm/dts/omap3-beagle.dts (revision 3ff0d8018105614a466b10265e6dff99de958135)
1*3ff0d801SDerald D. Woods/*
2*3ff0d801SDerald D. Woods * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3*3ff0d801SDerald D. Woods *
4*3ff0d801SDerald D. Woods * This program is free software; you can redistribute it and/or modify
5*3ff0d801SDerald D. Woods * it under the terms of the GNU General Public License version 2 as
6*3ff0d801SDerald D. Woods * published by the Free Software Foundation.
7*3ff0d801SDerald D. Woods */
8*3ff0d801SDerald D. Woods/dts-v1/;
9*3ff0d801SDerald D. Woods
10*3ff0d801SDerald D. Woods#include "omap34xx.dtsi"
11*3ff0d801SDerald D. Woods
12*3ff0d801SDerald D. Woods/ {
13*3ff0d801SDerald D. Woods	model = "TI OMAP3 BeagleBoard";
14*3ff0d801SDerald D. Woods	compatible = "ti,omap3-beagle", "ti,omap3";
15*3ff0d801SDerald D. Woods
16*3ff0d801SDerald D. Woods	cpus {
17*3ff0d801SDerald D. Woods		cpu@0 {
18*3ff0d801SDerald D. Woods			cpu0-supply = <&vcc>;
19*3ff0d801SDerald D. Woods		};
20*3ff0d801SDerald D. Woods	};
21*3ff0d801SDerald D. Woods
22*3ff0d801SDerald D. Woods	memory@80000000 {
23*3ff0d801SDerald D. Woods		device_type = "memory";
24*3ff0d801SDerald D. Woods		reg = <0x80000000 0x10000000>; /* 256 MB */
25*3ff0d801SDerald D. Woods	};
26*3ff0d801SDerald D. Woods
27*3ff0d801SDerald D. Woods	aliases {
28*3ff0d801SDerald D. Woods		display0 = &dvi0;
29*3ff0d801SDerald D. Woods		display1 = &tv0;
30*3ff0d801SDerald D. Woods	};
31*3ff0d801SDerald D. Woods
32*3ff0d801SDerald D. Woods	leds {
33*3ff0d801SDerald D. Woods		compatible = "gpio-leds";
34*3ff0d801SDerald D. Woods		pmu_stat {
35*3ff0d801SDerald D. Woods			label = "beagleboard::pmu_stat";
36*3ff0d801SDerald D. Woods			gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
37*3ff0d801SDerald D. Woods		};
38*3ff0d801SDerald D. Woods
39*3ff0d801SDerald D. Woods		heartbeat {
40*3ff0d801SDerald D. Woods			label = "beagleboard::usr0";
41*3ff0d801SDerald D. Woods			gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */
42*3ff0d801SDerald D. Woods			linux,default-trigger = "heartbeat";
43*3ff0d801SDerald D. Woods		};
44*3ff0d801SDerald D. Woods
45*3ff0d801SDerald D. Woods		mmc {
46*3ff0d801SDerald D. Woods			label = "beagleboard::usr1";
47*3ff0d801SDerald D. Woods			gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */
48*3ff0d801SDerald D. Woods			linux,default-trigger = "mmc0";
49*3ff0d801SDerald D. Woods		};
50*3ff0d801SDerald D. Woods	};
51*3ff0d801SDerald D. Woods
52*3ff0d801SDerald D. Woods	/* HS USB Port 2 Power */
53*3ff0d801SDerald D. Woods	hsusb2_power: hsusb2_power_reg {
54*3ff0d801SDerald D. Woods		compatible = "regulator-fixed";
55*3ff0d801SDerald D. Woods		regulator-name = "hsusb2_vbus";
56*3ff0d801SDerald D. Woods		regulator-min-microvolt = <3300000>;
57*3ff0d801SDerald D. Woods		regulator-max-microvolt = <3300000>;
58*3ff0d801SDerald D. Woods		gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>;	/* GPIO LEDA */
59*3ff0d801SDerald D. Woods		startup-delay-us = <70000>;
60*3ff0d801SDerald D. Woods	};
61*3ff0d801SDerald D. Woods
62*3ff0d801SDerald D. Woods	/* HS USB Host PHY on PORT 2 */
63*3ff0d801SDerald D. Woods	hsusb2_phy: hsusb2_phy {
64*3ff0d801SDerald D. Woods		compatible = "usb-nop-xceiv";
65*3ff0d801SDerald D. Woods		reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>;	/* gpio_147 */
66*3ff0d801SDerald D. Woods		vcc-supply = <&hsusb2_power>;
67*3ff0d801SDerald D. Woods		#phy-cells = <0>;
68*3ff0d801SDerald D. Woods	};
69*3ff0d801SDerald D. Woods
70*3ff0d801SDerald D. Woods	sound {
71*3ff0d801SDerald D. Woods		compatible = "ti,omap-twl4030";
72*3ff0d801SDerald D. Woods		ti,model = "omap3beagle";
73*3ff0d801SDerald D. Woods
74*3ff0d801SDerald D. Woods		ti,mcbsp = <&mcbsp2>;
75*3ff0d801SDerald D. Woods	};
76*3ff0d801SDerald D. Woods
77*3ff0d801SDerald D. Woods	gpio_keys {
78*3ff0d801SDerald D. Woods		compatible = "gpio-keys";
79*3ff0d801SDerald D. Woods
80*3ff0d801SDerald D. Woods		user {
81*3ff0d801SDerald D. Woods			label = "user";
82*3ff0d801SDerald D. Woods			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
83*3ff0d801SDerald D. Woods			linux,code = <0x114>;
84*3ff0d801SDerald D. Woods			wakeup-source;
85*3ff0d801SDerald D. Woods		};
86*3ff0d801SDerald D. Woods
87*3ff0d801SDerald D. Woods	};
88*3ff0d801SDerald D. Woods
89*3ff0d801SDerald D. Woods	tfp410: encoder0 {
90*3ff0d801SDerald D. Woods		compatible = "ti,tfp410";
91*3ff0d801SDerald D. Woods		powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;	/* gpio_170 */
92*3ff0d801SDerald D. Woods
93*3ff0d801SDerald D. Woods		pinctrl-names = "default";
94*3ff0d801SDerald D. Woods		pinctrl-0 = <&tfp410_pins>;
95*3ff0d801SDerald D. Woods
96*3ff0d801SDerald D. Woods		ports {
97*3ff0d801SDerald D. Woods			#address-cells = <1>;
98*3ff0d801SDerald D. Woods			#size-cells = <0>;
99*3ff0d801SDerald D. Woods
100*3ff0d801SDerald D. Woods			port@0 {
101*3ff0d801SDerald D. Woods				reg = <0>;
102*3ff0d801SDerald D. Woods
103*3ff0d801SDerald D. Woods				tfp410_in: endpoint {
104*3ff0d801SDerald D. Woods					remote-endpoint = <&dpi_out>;
105*3ff0d801SDerald D. Woods				};
106*3ff0d801SDerald D. Woods			};
107*3ff0d801SDerald D. Woods
108*3ff0d801SDerald D. Woods			port@1 {
109*3ff0d801SDerald D. Woods				reg = <1>;
110*3ff0d801SDerald D. Woods
111*3ff0d801SDerald D. Woods				tfp410_out: endpoint {
112*3ff0d801SDerald D. Woods					remote-endpoint = <&dvi_connector_in>;
113*3ff0d801SDerald D. Woods				};
114*3ff0d801SDerald D. Woods			};
115*3ff0d801SDerald D. Woods		};
116*3ff0d801SDerald D. Woods	};
117*3ff0d801SDerald D. Woods
118*3ff0d801SDerald D. Woods	dvi0: connector0 {
119*3ff0d801SDerald D. Woods		compatible = "dvi-connector";
120*3ff0d801SDerald D. Woods		label = "dvi";
121*3ff0d801SDerald D. Woods
122*3ff0d801SDerald D. Woods		digital;
123*3ff0d801SDerald D. Woods
124*3ff0d801SDerald D. Woods		ddc-i2c-bus = <&i2c3>;
125*3ff0d801SDerald D. Woods
126*3ff0d801SDerald D. Woods		port {
127*3ff0d801SDerald D. Woods			dvi_connector_in: endpoint {
128*3ff0d801SDerald D. Woods				remote-endpoint = <&tfp410_out>;
129*3ff0d801SDerald D. Woods			};
130*3ff0d801SDerald D. Woods		};
131*3ff0d801SDerald D. Woods	};
132*3ff0d801SDerald D. Woods
133*3ff0d801SDerald D. Woods	tv0: connector1 {
134*3ff0d801SDerald D. Woods		compatible = "svideo-connector";
135*3ff0d801SDerald D. Woods		label = "tv";
136*3ff0d801SDerald D. Woods
137*3ff0d801SDerald D. Woods		port {
138*3ff0d801SDerald D. Woods			tv_connector_in: endpoint {
139*3ff0d801SDerald D. Woods				remote-endpoint = <&venc_out>;
140*3ff0d801SDerald D. Woods			};
141*3ff0d801SDerald D. Woods		};
142*3ff0d801SDerald D. Woods	};
143*3ff0d801SDerald D. Woods
144*3ff0d801SDerald D. Woods	etb@540000000 {
145*3ff0d801SDerald D. Woods		compatible = "arm,coresight-etb10", "arm,primecell";
146*3ff0d801SDerald D. Woods		reg = <0x5401b000 0x1000>;
147*3ff0d801SDerald D. Woods
148*3ff0d801SDerald D. Woods		clocks = <&emu_src_ck>;
149*3ff0d801SDerald D. Woods		clock-names = "apb_pclk";
150*3ff0d801SDerald D. Woods		port {
151*3ff0d801SDerald D. Woods			etb_in: endpoint {
152*3ff0d801SDerald D. Woods				slave-mode;
153*3ff0d801SDerald D. Woods				remote-endpoint = <&etm_out>;
154*3ff0d801SDerald D. Woods			};
155*3ff0d801SDerald D. Woods		};
156*3ff0d801SDerald D. Woods	};
157*3ff0d801SDerald D. Woods
158*3ff0d801SDerald D. Woods	etm@54010000 {
159*3ff0d801SDerald D. Woods		compatible = "arm,coresight-etm3x", "arm,primecell";
160*3ff0d801SDerald D. Woods		reg = <0x54010000 0x1000>;
161*3ff0d801SDerald D. Woods
162*3ff0d801SDerald D. Woods		clocks = <&emu_src_ck>;
163*3ff0d801SDerald D. Woods		clock-names = "apb_pclk";
164*3ff0d801SDerald D. Woods		port {
165*3ff0d801SDerald D. Woods			etm_out: endpoint {
166*3ff0d801SDerald D. Woods				remote-endpoint = <&etb_in>;
167*3ff0d801SDerald D. Woods			};
168*3ff0d801SDerald D. Woods		};
169*3ff0d801SDerald D. Woods	};
170*3ff0d801SDerald D. Woods};
171*3ff0d801SDerald D. Woods
172*3ff0d801SDerald D. Woods&omap3_pmx_wkup {
173*3ff0d801SDerald D. Woods	gpio1_pins: pinmux_gpio1_pins {
174*3ff0d801SDerald D. Woods		pinctrl-single,pins = <
175*3ff0d801SDerald D. Woods			OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
176*3ff0d801SDerald D. Woods		>;
177*3ff0d801SDerald D. Woods	};
178*3ff0d801SDerald D. Woods};
179*3ff0d801SDerald D. Woods
180*3ff0d801SDerald D. Woods&omap3_pmx_core {
181*3ff0d801SDerald D. Woods	pinctrl-names = "default";
182*3ff0d801SDerald D. Woods	pinctrl-0 = <
183*3ff0d801SDerald D. Woods			&hsusb2_pins
184*3ff0d801SDerald D. Woods	>;
185*3ff0d801SDerald D. Woods
186*3ff0d801SDerald D. Woods	hsusb2_pins: pinmux_hsusb2_pins {
187*3ff0d801SDerald D. Woods		pinctrl-single,pins = <
188*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi1_cs3.hsusb2_data2 */
189*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_clk.hsusb2_data7 */
190*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_simo.hsusb2_data4 */
191*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_somi.hsusb2_data5 */
192*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs0.hsusb2_data6 */
193*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs1.hsusb2_data3 */
194*3ff0d801SDerald D. Woods		>;
195*3ff0d801SDerald D. Woods	};
196*3ff0d801SDerald D. Woods
197*3ff0d801SDerald D. Woods	uart3_pins: pinmux_uart3_pins {
198*3ff0d801SDerald D. Woods		pinctrl-single,pins = <
199*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
200*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
201*3ff0d801SDerald D. Woods		>;
202*3ff0d801SDerald D. Woods	};
203*3ff0d801SDerald D. Woods
204*3ff0d801SDerald D. Woods	tfp410_pins: pinmux_tfp410_pins {
205*3ff0d801SDerald D. Woods		pinctrl-single,pins = <
206*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4)	/* hdq_sio.gpio_170 */
207*3ff0d801SDerald D. Woods		>;
208*3ff0d801SDerald D. Woods	};
209*3ff0d801SDerald D. Woods
210*3ff0d801SDerald D. Woods	dss_dpi_pins: pinmux_dss_dpi_pins {
211*3ff0d801SDerald D. Woods		pinctrl-single,pins = <
212*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
213*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
214*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
215*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */
216*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)   /* dss_data0.dss_data0 */
217*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)   /* dss_data1.dss_data1 */
218*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)   /* dss_data2.dss_data2 */
219*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)   /* dss_data3.dss_data3 */
220*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)   /* dss_data4.dss_data4 */
221*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)   /* dss_data5.dss_data5 */
222*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
223*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
224*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
225*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
226*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
227*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
228*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
229*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
230*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
231*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
232*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
233*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */
234*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)   /* dss_data18.dss_data18 */
235*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)   /* dss_data19.dss_data19 */
236*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)   /* dss_data20.dss_data20 */
237*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)   /* dss_data21.dss_data21 */
238*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)   /* dss_data22.dss_data22 */
239*3ff0d801SDerald D. Woods			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)   /* dss_data23.dss_data23 */
240*3ff0d801SDerald D. Woods		>;
241*3ff0d801SDerald D. Woods	};
242*3ff0d801SDerald D. Woods};
243*3ff0d801SDerald D. Woods
244*3ff0d801SDerald D. Woods&omap3_pmx_core2 {
245*3ff0d801SDerald D. Woods	pinctrl-names = "default";
246*3ff0d801SDerald D. Woods	pinctrl-0 = <
247*3ff0d801SDerald D. Woods			&hsusb2_2_pins
248*3ff0d801SDerald D. Woods	>;
249*3ff0d801SDerald D. Woods
250*3ff0d801SDerald D. Woods	hsusb2_2_pins: pinmux_hsusb2_2_pins {
251*3ff0d801SDerald D. Woods		pinctrl-single,pins = <
252*3ff0d801SDerald D. Woods			OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
253*3ff0d801SDerald D. Woods			OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
254*3ff0d801SDerald D. Woods			OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
255*3ff0d801SDerald D. Woods			OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
256*3ff0d801SDerald D. Woods			OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
257*3ff0d801SDerald D. Woods			OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
258*3ff0d801SDerald D. Woods		>;
259*3ff0d801SDerald D. Woods	};
260*3ff0d801SDerald D. Woods};
261*3ff0d801SDerald D. Woods
262*3ff0d801SDerald D. Woods&i2c1 {
263*3ff0d801SDerald D. Woods	clock-frequency = <2600000>;
264*3ff0d801SDerald D. Woods
265*3ff0d801SDerald D. Woods	twl: twl@48 {
266*3ff0d801SDerald D. Woods		reg = <0x48>;
267*3ff0d801SDerald D. Woods		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
268*3ff0d801SDerald D. Woods		interrupt-parent = <&intc>;
269*3ff0d801SDerald D. Woods
270*3ff0d801SDerald D. Woods		twl_audio: audio {
271*3ff0d801SDerald D. Woods			compatible = "ti,twl4030-audio";
272*3ff0d801SDerald D. Woods			codec {
273*3ff0d801SDerald D. Woods			};
274*3ff0d801SDerald D. Woods		};
275*3ff0d801SDerald D. Woods	};
276*3ff0d801SDerald D. Woods};
277*3ff0d801SDerald D. Woods
278*3ff0d801SDerald D. Woods#include "twl4030.dtsi"
279*3ff0d801SDerald D. Woods#include "twl4030_omap3.dtsi"
280*3ff0d801SDerald D. Woods
281*3ff0d801SDerald D. Woods&i2c3 {
282*3ff0d801SDerald D. Woods	clock-frequency = <100000>;
283*3ff0d801SDerald D. Woods};
284*3ff0d801SDerald D. Woods
285*3ff0d801SDerald D. Woods&mmc1 {
286*3ff0d801SDerald D. Woods	vmmc-supply = <&vmmc1>;
287*3ff0d801SDerald D. Woods	vqmmc-supply = <&vsim>;
288*3ff0d801SDerald D. Woods	bus-width = <8>;
289*3ff0d801SDerald D. Woods};
290*3ff0d801SDerald D. Woods
291*3ff0d801SDerald D. Woods&mmc2 {
292*3ff0d801SDerald D. Woods	status = "disabled";
293*3ff0d801SDerald D. Woods};
294*3ff0d801SDerald D. Woods
295*3ff0d801SDerald D. Woods&mmc3 {
296*3ff0d801SDerald D. Woods	status = "disabled";
297*3ff0d801SDerald D. Woods};
298*3ff0d801SDerald D. Woods
299*3ff0d801SDerald D. Woods&usbhshost {
300*3ff0d801SDerald D. Woods	port2-mode = "ehci-phy";
301*3ff0d801SDerald D. Woods};
302*3ff0d801SDerald D. Woods
303*3ff0d801SDerald D. Woods&usbhsehci {
304*3ff0d801SDerald D. Woods	phys = <0 &hsusb2_phy>;
305*3ff0d801SDerald D. Woods};
306*3ff0d801SDerald D. Woods
307*3ff0d801SDerald D. Woods&twl_gpio {
308*3ff0d801SDerald D. Woods	ti,use-leds;
309*3ff0d801SDerald D. Woods	/* pullups: BIT(1) */
310*3ff0d801SDerald D. Woods	ti,pullups = <0x000002>;
311*3ff0d801SDerald D. Woods	/*
312*3ff0d801SDerald D. Woods	 * pulldowns:
313*3ff0d801SDerald D. Woods	 * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
314*3ff0d801SDerald D. Woods	 * BIT(15), BIT(16), BIT(17)
315*3ff0d801SDerald D. Woods	 */
316*3ff0d801SDerald D. Woods	ti,pulldowns = <0x03a1c4>;
317*3ff0d801SDerald D. Woods};
318*3ff0d801SDerald D. Woods
319*3ff0d801SDerald D. Woods&uart3 {
320*3ff0d801SDerald D. Woods	pinctrl-names = "default";
321*3ff0d801SDerald D. Woods	pinctrl-0 = <&uart3_pins>;
322*3ff0d801SDerald D. Woods	interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
323*3ff0d801SDerald D. Woods};
324*3ff0d801SDerald D. Woods
325*3ff0d801SDerald D. Woods&gpio1 {
326*3ff0d801SDerald D. Woods	pinctrl-names = "default";
327*3ff0d801SDerald D. Woods	pinctrl-0 = <&gpio1_pins>;
328*3ff0d801SDerald D. Woods};
329*3ff0d801SDerald D. Woods
330*3ff0d801SDerald D. Woods&usb_otg_hs {
331*3ff0d801SDerald D. Woods	interface-type = <0>;
332*3ff0d801SDerald D. Woods	usb-phy = <&usb2_phy>;
333*3ff0d801SDerald D. Woods	phys = <&usb2_phy>;
334*3ff0d801SDerald D. Woods	phy-names = "usb2-phy";
335*3ff0d801SDerald D. Woods	mode = <3>;
336*3ff0d801SDerald D. Woods	power = <50>;
337*3ff0d801SDerald D. Woods};
338*3ff0d801SDerald D. Woods
339*3ff0d801SDerald D. Woods&vaux2 {
340*3ff0d801SDerald D. Woods	regulator-name = "vdd_ehci";
341*3ff0d801SDerald D. Woods	regulator-min-microvolt = <1800000>;
342*3ff0d801SDerald D. Woods	regulator-max-microvolt = <1800000>;
343*3ff0d801SDerald D. Woods	regulator-always-on;
344*3ff0d801SDerald D. Woods};
345*3ff0d801SDerald D. Woods
346*3ff0d801SDerald D. Woods&mcbsp2 {
347*3ff0d801SDerald D. Woods	status = "okay";
348*3ff0d801SDerald D. Woods};
349*3ff0d801SDerald D. Woods
350*3ff0d801SDerald D. Woods/* Needed to power the DPI pins */
351*3ff0d801SDerald D. Woods&vpll2 {
352*3ff0d801SDerald D. Woods	regulator-always-on;
353*3ff0d801SDerald D. Woods};
354*3ff0d801SDerald D. Woods
355*3ff0d801SDerald D. Woods&dss {
356*3ff0d801SDerald D. Woods	status = "ok";
357*3ff0d801SDerald D. Woods
358*3ff0d801SDerald D. Woods	pinctrl-names = "default";
359*3ff0d801SDerald D. Woods	pinctrl-0 = <&dss_dpi_pins>;
360*3ff0d801SDerald D. Woods
361*3ff0d801SDerald D. Woods	port {
362*3ff0d801SDerald D. Woods		dpi_out: endpoint {
363*3ff0d801SDerald D. Woods			remote-endpoint = <&tfp410_in>;
364*3ff0d801SDerald D. Woods			data-lines = <24>;
365*3ff0d801SDerald D. Woods		};
366*3ff0d801SDerald D. Woods	};
367*3ff0d801SDerald D. Woods};
368*3ff0d801SDerald D. Woods
369*3ff0d801SDerald D. Woods&venc {
370*3ff0d801SDerald D. Woods	status = "ok";
371*3ff0d801SDerald D. Woods
372*3ff0d801SDerald D. Woods	vdda-supply = <&vdac>;
373*3ff0d801SDerald D. Woods
374*3ff0d801SDerald D. Woods	port {
375*3ff0d801SDerald D. Woods		venc_out: endpoint {
376*3ff0d801SDerald D. Woods			remote-endpoint = <&tv_connector_in>;
377*3ff0d801SDerald D. Woods			ti,channels = <2>;
378*3ff0d801SDerald D. Woods		};
379*3ff0d801SDerald D. Woods	};
380*3ff0d801SDerald D. Woods};
381*3ff0d801SDerald D. Woods
382*3ff0d801SDerald D. Woods&gpmc {
383*3ff0d801SDerald D. Woods	status = "ok";
384*3ff0d801SDerald D. Woods	ranges = <0 0 0x30000000 0x1000000>;	/* CS0 space, 16MB */
385*3ff0d801SDerald D. Woods
386*3ff0d801SDerald D. Woods	/* Chip select 0 */
387*3ff0d801SDerald D. Woods	nand@0,0 {
388*3ff0d801SDerald D. Woods		compatible = "ti,omap2-nand";
389*3ff0d801SDerald D. Woods		reg = <0 0 4>;		/* NAND I/O window, 4 bytes */
390*3ff0d801SDerald D. Woods		interrupt-parent = <&gpmc>;
391*3ff0d801SDerald D. Woods		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
392*3ff0d801SDerald D. Woods			     <1 IRQ_TYPE_NONE>;	/* termcount */
393*3ff0d801SDerald D. Woods		ti,nand-ecc-opt = "ham1";
394*3ff0d801SDerald D. Woods		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
395*3ff0d801SDerald D. Woods		nand-bus-width = <16>;
396*3ff0d801SDerald D. Woods		#address-cells = <1>;
397*3ff0d801SDerald D. Woods		#size-cells = <1>;
398*3ff0d801SDerald D. Woods
399*3ff0d801SDerald D. Woods		gpmc,device-width = <2>;
400*3ff0d801SDerald D. Woods		gpmc,cs-on-ns = <0>;
401*3ff0d801SDerald D. Woods		gpmc,cs-rd-off-ns = <36>;
402*3ff0d801SDerald D. Woods		gpmc,cs-wr-off-ns = <36>;
403*3ff0d801SDerald D. Woods		gpmc,adv-on-ns = <6>;
404*3ff0d801SDerald D. Woods		gpmc,adv-rd-off-ns = <24>;
405*3ff0d801SDerald D. Woods		gpmc,adv-wr-off-ns = <36>;
406*3ff0d801SDerald D. Woods		gpmc,oe-on-ns = <6>;
407*3ff0d801SDerald D. Woods		gpmc,oe-off-ns = <48>;
408*3ff0d801SDerald D. Woods		gpmc,we-on-ns = <6>;
409*3ff0d801SDerald D. Woods		gpmc,we-off-ns = <30>;
410*3ff0d801SDerald D. Woods		gpmc,rd-cycle-ns = <72>;
411*3ff0d801SDerald D. Woods		gpmc,wr-cycle-ns = <72>;
412*3ff0d801SDerald D. Woods		gpmc,access-ns = <54>;
413*3ff0d801SDerald D. Woods		gpmc,wr-access-ns = <30>;
414*3ff0d801SDerald D. Woods
415*3ff0d801SDerald D. Woods		partition@0 {
416*3ff0d801SDerald D. Woods			label = "X-Loader";
417*3ff0d801SDerald D. Woods			reg = <0 0x80000>;
418*3ff0d801SDerald D. Woods		};
419*3ff0d801SDerald D. Woods		partition@80000 {
420*3ff0d801SDerald D. Woods			label = "U-Boot";
421*3ff0d801SDerald D. Woods			reg = <0x80000 0x1e0000>;
422*3ff0d801SDerald D. Woods		};
423*3ff0d801SDerald D. Woods		partition@1c0000 {
424*3ff0d801SDerald D. Woods			label = "U-Boot Env";
425*3ff0d801SDerald D. Woods			reg = <0x260000 0x20000>;
426*3ff0d801SDerald D. Woods		};
427*3ff0d801SDerald D. Woods		partition@280000 {
428*3ff0d801SDerald D. Woods			label = "Kernel";
429*3ff0d801SDerald D. Woods			reg = <0x280000 0x400000>;
430*3ff0d801SDerald D. Woods		};
431*3ff0d801SDerald D. Woods		partition@780000 {
432*3ff0d801SDerald D. Woods			label = "Filesystem";
433*3ff0d801SDerald D. Woods			reg = <0x680000 0xf980000>;
434*3ff0d801SDerald D. Woods		};
435*3ff0d801SDerald D. Woods	};
436*3ff0d801SDerald D. Woods};
437