xref: /openbmc/u-boot/arch/arm/dts/exynos5250-spring.dts (revision 8d135f5c6f6b52c3a3de4512d8f838a9dbb2f6b5)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Google Spring board device tree source
4 *
5 * Copyright (c) 2013 Google, Inc
6 * Copyright (c) 2014 SUSE LINUX Products GmbH
7 */
8
9/dts-v1/;
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/input/input.h>
13#include "exynos5250.dtsi"
14
15/ {
16	model = "Google Spring";
17	compatible = "google,spring", "samsung,exynos5250", "samsung,exynos5";
18
19	aliases {
20		i2c0 = "/i2c@12C60000";
21		i2c1 = "/i2c@12C70000";
22		i2c2 = "/i2c@12C80000";
23		i2c3 = "/i2c@12C90000";
24		i2c4 = "/i2c@12CA0000";
25		i2c5 = "/i2c@12CB0000";
26		i2c6 = "/i2c@12CC0000";
27		i2c7 = "/i2c@12CD0000";
28		i2c104 = &cros_ec_ldo_tunnel;
29		spi0 = "/spi@12d20000";
30		spi1 = "/spi@12d30000";
31		spi2 = "/spi@12d40000";
32		spi3 = "/spi@131a0000";
33		spi4 = "/spi@131b0000";
34		mmc0 = "/mmc@12200000";
35		serial0 = "/serial@12C30000";
36		console = "/serial@12C30000";
37	};
38
39	memory {
40		reg = <0x40000000 0x80000000>;
41	};
42
43	flash@0 {
44		spl { /* spl size override */
45			size = <0x8000>;
46		};
47	};
48
49	chosen {
50		bootargs = "console=tty1";
51		stdout-path = "serial3:115200n8";
52	};
53
54	board-rev {
55		compatible = "google,board-revision";
56		google,board-rev-gpios = <&gpy4 0 0>, <&gpy4 1 0>,
57					 <&gpy4 2 0>;
58	};
59
60	i2c@12C90000 {
61		clock-frequency = <100000>;
62		tpm@20 {
63			reg = <0x20>;
64			compatible = "infineon,slb9645tt";
65		};
66	};
67
68	mmc@12200000 {
69		samsung,bus-width = <8>;
70		samsung,timing = <1 3 3>;
71		samsung,removable = <0>;
72	};
73
74	mmc@12210000 {
75		status = "disabled";
76	};
77
78	mmc@12220000 {
79		/* MMC2 pins are used as GPIO for eDP bridge */
80		status = "disabled";
81	};
82
83	mmc@12230000 {
84		status = "disabled";
85	};
86
87	ehci@12110000 {
88		samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
89		status = "okay";
90	};
91
92	xhci@12000000 {
93		samsung,vbus-gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>;
94	};
95
96	sound {
97		compatible = "google,spring-audio-max98088";
98
99		samsung,model = "Spring-I2S-MAX98088";
100		samsung,audio-codec = <&max98088>;
101		codec-enable-gpio = <&gpx1 7 0>;
102
103		cpu {
104			sound-dai = <&i2s1 0>;
105		};
106
107		codec {
108			sound-dai = <&max98088 0>;
109		};
110	};
111
112	spi@12d30000 {
113		spi-max-frequency = <50000000>;
114		firmware_storage_spi: flash@0 {
115			compatible = "spi-flash";
116			reg = <0>;
117		};
118	};
119
120	tmu@10060000 {
121		samsung,min-temp	= <25>;
122		samsung,max-temp	= <125>;
123		samsung,start-warning	= <95>;
124		samsung,start-tripping	= <105>;
125		samsung,hw-tripping	= <110>;
126		samsung,efuse-min-value	= <40>;
127		samsung,efuse-value	= <55>;
128		samsung,efuse-max-value	= <100>;
129		samsung,slope		= <274761730>;
130		samsung,dc-value	= <25>;
131	};
132
133	fimd@14400000 {
134		samsung,vl-freq = <60>;
135		samsung,vl-col = <1366>;
136		samsung,vl-row = <768>;
137		samsung,vl-width = <1366>;
138		samsung,vl-height = <768>;
139
140		samsung,vl-clkp;
141		samsung,vl-dp;
142		samsung,vl-hsp;
143		samsung,vl-vsp;
144
145		samsung,vl-bpix = <4>;
146
147		samsung,vl-hspw = <32>;
148		samsung,vl-hbpd = <80>;
149		samsung,vl-hfpd = <48>;
150		samsung,vl-vspw = <5>;
151		samsung,vl-vbpd = <14>;
152		samsung,vl-vfpd = <3>;
153		samsung,vl-cmd-allow-len = <0xf>;
154
155		samsung,winid = <0>;
156		samsung,interface-mode = <1>;
157		samsung,dp-enabled = <1>;
158		samsung,dual-lcd-enabled = <0>;
159	};
160
161	dp@145b0000 {
162		samsung,lt-status = <0>;
163
164		samsung,master-mode = <0>;
165		samsung,bist-mode = <0>;
166		samsung,bist-pattern = <0>;
167		samsung,h-sync-polarity = <0>;
168		samsung,v-sync-polarity = <0>;
169		samsung,interlaced = <0>;
170		samsung,color-space = <0>;
171		samsung,dynamic-range = <0>;
172		samsung,ycbcr-coeff = <0>;
173		samsung,color-depth = <1>;
174	};
175
176	backlight: backlight {
177		compatible = "pwm-backlight";
178		pwms = <&pwm 0 1000000 0>;
179		brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
180		default-brightness-level = <1>;
181		enable-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
182		power-supply = <&fet1>;
183	};
184
185	panel: panel {
186		compatible = "auo,b116xw03";
187		power-supply = <&fet6>;
188		backlight = <&backlight>;
189
190		port {
191			panel_in: endpoint {
192				remote-endpoint = <&bridge_out>;
193			};
194		};
195	};
196};
197
198&i2c_0 {
199	status = "okay";
200	samsung,i2c-sda-delay = <100>;
201	samsung,i2c-max-bus-freq = <378000>;
202
203	s5m8767-pmic@66 {
204		compatible = "samsung,s5m8767-pmic";
205		reg = <0x66>;
206		interrupt-parent = <&gpx3>;
207		wakeup-source;
208
209		s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>, /* DVS1 */
210		                              <&gpd1 1 GPIO_ACTIVE_LOW>, /* DVS2 */
211		                              <&gpd1 2 GPIO_ACTIVE_LOW>; /* DVS3 */
212
213		s5m8767,pmic-buck-ds-gpios = <&gpx2 3 GPIO_ACTIVE_LOW>, /* SET1 */
214		                             <&gpx2 4 GPIO_ACTIVE_LOW>, /* SET2 */
215		                             <&gpx2 5 GPIO_ACTIVE_LOW>; /* SET3 */
216
217		/*
218		 * The following arrays of DVS voltages are not used, since we are
219		 * not using GPIOs to control PMIC bucks, but they must be defined
220		 * to please the driver.
221		 */
222		s5m8767,pmic-buck2-dvs-voltage = <1350000>, <1300000>,
223		                                 <1250000>, <1200000>,
224		                                 <1150000>, <1100000>,
225		                                 <1000000>, <950000>;
226
227		s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>,
228		                                 <1100000>, <1100000>,
229		                                 <1000000>, <1000000>,
230		                                 <1000000>, <1000000>;
231
232		s5m8767,pmic-buck4-dvs-voltage = <1200000>, <1200000>,
233		                                 <1200000>, <1200000>,
234		                                 <1200000>, <1200000>,
235		                                 <1200000>, <1200000>;
236
237		clocks {
238			compatible = "samsung,s5m8767-clk";
239			#clock-cells = <1>;
240			clock-output-names = "en32khz_ap",
241			                     "en32khz_cp",
242			                     "en32khz_bt";
243		};
244
245		regulators {
246			ldo4_reg: LDO4 {
247				regulator-name = "P1.0V_LDO_OUT4";
248				regulator-min-microvolt = <1000000>;
249				regulator-max-microvolt = <1000000>;
250				regulator-always-on;
251				op_mode = <0>;
252			};
253
254			ldo5_reg: LDO5 {
255				regulator-name = "P1.8V_LDO_OUT5";
256				regulator-min-microvolt = <1800000>;
257				regulator-max-microvolt = <1800000>;
258				regulator-always-on;
259				op_mode = <0>;
260			};
261
262			ldo6_reg: LDO6 {
263				regulator-name = "vdd_mydp";
264				regulator-min-microvolt = <1200000>;
265				regulator-max-microvolt = <1200000>;
266				regulator-always-on;
267				op_mode = <3>;
268			};
269
270			ldo7_reg: LDO7 {
271				regulator-name = "P1.1V_LDO_OUT7";
272				regulator-min-microvolt = <1100000>;
273				regulator-max-microvolt = <1100000>;
274				regulator-always-on;
275				op_mode = <3>;
276			};
277
278			ldo8_reg: LDO8 {
279				regulator-name = "P1.0V_LDO_OUT8";
280				regulator-min-microvolt = <1000000>;
281				regulator-max-microvolt = <1000000>;
282				regulator-always-on;
283				op_mode = <3>;
284			};
285
286			ldo10_reg: LDO10 {
287				regulator-name = "P1.8V_LDO_OUT10";
288				regulator-min-microvolt = <1800000>;
289				regulator-max-microvolt = <1800000>;
290				regulator-always-on;
291				op_mode = <3>;
292			};
293
294			ldo11_reg: LDO11 {
295				regulator-name = "P1.8V_LDO_OUT11";
296				regulator-min-microvolt = <1800000>;
297				regulator-max-microvolt = <1800000>;
298				regulator-always-on;
299				op_mode = <0>;
300			};
301
302			ldo12_reg: LDO12 {
303				regulator-name = "P3.0V_LDO_OUT12";
304				regulator-min-microvolt = <3000000>;
305				regulator-max-microvolt = <3000000>;
306				regulator-always-on;
307				op_mode = <3>;
308			};
309
310			ldo13_reg: LDO13 {
311				regulator-name = "P1.8V_LDO_OUT13";
312				regulator-min-microvolt = <1800000>;
313				regulator-max-microvolt = <1800000>;
314				regulator-always-on;
315				op_mode = <0>;
316			};
317
318			ldo14_reg: LDO14 {
319				regulator-name = "P1.8V_LDO_OUT14";
320				regulator-min-microvolt = <1800000>;
321				regulator-max-microvolt = <1800000>;
322				regulator-always-on;
323				op_mode = <3>;
324			};
325
326			ldo15_reg: LDO15 {
327				regulator-name = "P1.0V_LDO_OUT15";
328				regulator-min-microvolt = <1000000>;
329				regulator-max-microvolt = <1000000>;
330				regulator-always-on;
331				op_mode = <3>;
332			};
333
334			ldo16_reg: LDO16 {
335				regulator-name = "P1.8V_LDO_OUT16";
336				regulator-min-microvolt = <1800000>;
337				regulator-max-microvolt = <1800000>;
338				regulator-always-on;
339				op_mode = <3>;
340			};
341
342			ldo17_reg: LDO17 {
343				regulator-name = "P1.2V_LDO_OUT17";
344				regulator-min-microvolt = <1200000>;
345				regulator-max-microvolt = <1200000>;
346				regulator-always-on;
347				op_mode = <0>;
348			};
349
350			ldo25_reg: LDO25 {
351				regulator-name = "vdd_bridge";
352				regulator-min-microvolt = <1200000>;
353				regulator-max-microvolt = <1200000>;
354				regulator-always-on;
355				op_mode = <1>;
356			};
357
358			buck1_reg: BUCK1 {
359				regulator-name = "vdd_mif";
360				regulator-min-microvolt = <950000>;
361				regulator-max-microvolt = <1300000>;
362				regulator-always-on;
363				regulator-boot-on;
364				op_mode = <3>;
365			};
366
367			buck2_reg: BUCK2 {
368				regulator-name = "vdd_arm";
369				regulator-min-microvolt = <850000>;
370				regulator-max-microvolt = <1350000>;
371				regulator-always-on;
372				regulator-boot-on;
373				op_mode = <3>;
374			};
375
376			buck3_reg: BUCK3 {
377				regulator-name = "vdd_int";
378				regulator-min-microvolt = <900000>;
379				regulator-max-microvolt = <1200000>;
380				regulator-always-on;
381				regulator-boot-on;
382				op_mode = <3>;
383			};
384
385			buck4_reg: BUCK4 {
386				regulator-name = "vdd_g3d";
387				regulator-min-microvolt = <850000>;
388				regulator-max-microvolt = <1300000>;
389				regulator-boot-on;
390				op_mode = <3>;
391			};
392
393			buck5_reg: BUCK5 {
394				regulator-name = "P1.8V_BUCK_OUT5";
395				regulator-min-microvolt = <1800000>;
396				regulator-max-microvolt = <1800000>;
397				regulator-always-on;
398				regulator-boot-on;
399				op_mode = <1>;
400			};
401
402			buck6_reg: BUCK6 {
403				regulator-name = "P1.2V_BUCK_OUT6";
404				regulator-min-microvolt = <2050000>;
405				regulator-max-microvolt = <2050000>;
406				regulator-always-on;
407				regulator-boot-on;
408				op_mode = <0>;
409			};
410
411			buck9_reg: BUCK9 {
412				regulator-name = "vdd_ummc";
413				regulator-min-microvolt = <950000>;
414				regulator-max-microvolt = <3000000>;
415				regulator-always-on;
416				regulator-boot-on;
417				op_mode = <3>;
418			};
419		};
420	};
421};
422
423&dp {
424	status = "okay";
425	samsung,color-space = <0>;
426	samsung,dynamic-range = <0>;
427	samsung,ycbcr-coeff = <0>;
428	samsung,color-depth = <1>;
429	samsung,link-rate = <0x0a>;
430	samsung,lane-count = <1>;
431	samsung,hpd-gpio = <&gpc3 0 GPIO_ACTIVE_HIGH>;
432
433	ports {
434		port@0 {
435			dp_out: endpoint {
436				remote-endpoint = <&bridge_in>;
437			};
438		};
439	};
440};
441
442&i2c_1 {
443	status = "okay";
444	samsung,i2c-sda-delay = <100>;
445	samsung,i2c-max-bus-freq = <378000>;
446};
447
448&i2c_2 {
449	status = "okay";
450	samsung,i2c-sda-delay = <100>;
451	samsung,i2c-max-bus-freq = <66000>;
452};
453
454&i2c_3 {
455	status = "okay";
456	samsung,i2c-sda-delay = <100>;
457	samsung,i2c-max-bus-freq = <66000>;
458};
459
460&i2c_4 {
461	status = "okay";
462	samsung,i2c-sda-delay = <100>;
463	samsung,i2c-max-bus-freq = <66000>;
464	clock-frequency = <66000>;
465
466	cros_ec: embedded-controller {
467		compatible = "google,cros-ec-i2c";
468		reg = <0x1e>;
469		interrupts = <6 IRQ_TYPE_NONE>;
470		interrupt-parent = <&gpx1>;
471		wakeup-source;
472		u-boot,i2c-offset-len = <0>;
473		ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>;
474		cros_ec_ldo_tunnel: cros-ec-ldo-tunnel {
475			compatible = "google,cros-ec-ldo-tunnel";
476			#address-cells = <1>;
477			#size-cells = <0>;
478			power-regulator {
479				compatible = "ti,tps65090";
480				reg = <0x48>;
481
482				regulators {
483					dcdc1 {
484						ti,enable-ext-control;
485					};
486					dcdc2 {
487						ti,enable-ext-control;
488					};
489					dcdc3 {
490						ti,enable-ext-control;
491					};
492					fet1: fet1 {
493						regulator-name = "vcd_led";
494						ti,overcurrent-wait = <3>;
495					};
496					tps65090_fet2: fet2 {
497						regulator-name = "video_mid";
498						regulator-always-on;
499						ti,overcurrent-wait = <3>;
500					};
501					fet3 {
502						regulator-name = "wwan_r";
503						regulator-always-on;
504						ti,overcurrent-wait = <3>;
505					};
506					fet4 {
507						regulator-name = "sdcard";
508						ti,overcurrent-wait = <3>;
509					};
510					fet5 {
511						regulator-name = "camout";
512						regulator-always-on;
513						ti,overcurrent-wait = <3>;
514					};
515					fet6: fet6 {
516						regulator-name = "lcd_vdd";
517						ti,overcurrent-wait = <3>;
518					};
519					tps65090_fet7: fet7 {
520						regulator-name = "video_mid_1a";
521						regulator-always-on;
522						ti,overcurrent-wait = <3>;
523					};
524					ldo1 {
525					};
526					ldo2 {
527					};
528				};
529			};
530		};
531	};
532};
533
534&i2c_5 {
535	status = "okay";
536	samsung,i2c-sda-delay = <100>;
537	samsung,i2c-max-bus-freq = <66000>;
538};
539
540&i2c_7 {
541	status = "okay";
542	samsung,i2c-sda-delay = <100>;
543	samsung,i2c-max-bus-freq = <66000>;
544
545	ps8622-bridge@8 {
546		compatible = "parade,ps8622";
547		reg = <0x8>;
548		sleep-gpios = <&gpc3 6 GPIO_ACTIVE_LOW>;
549		reset-gpios = <&gpc3 1 GPIO_ACTIVE_LOW>;
550		hotplug-gpios = <&gpc3 0 GPIO_ACTIVE_HIGH>;
551		power-supply = <&ldo6_reg>;
552		parade,regs = /bits/ 8 <
553			0x02 0xa1 0x01 /* HPD low */
554			/*
555			 * SW setting: [1:0] SW output 1.2V voltage is
556			 * lower to 96%
557			 */
558			0x04 0x14 0x01
559			/* RCO SS setting: [5:4] = b01 0.5%, b10 1%, b11 1.5% */
560			0x04 0xe3 0x20
561			0x04 0xe2 0x80 /* [7] RCO SS enable */
562			/*
563			 * RPHY Setting: [3:2] CDR tune wait cycle before
564			 * measure for fine tune b00: 1us,
565			 * 01: 0.5us, 10:2us, 11:4us
566			 */
567			0x04 0x8a 0x0c
568			0x04 0x89 0x08 /* [3] RFD always on */
569			/*
570			 * CTN lock in/out: 20000ppm/80000ppm. Lock out 2 times
571			 */
572			0x04 0x71 0x2d
573			/* 2.7G CDR settings */
574			0x04 0x7d 0x07 /* NOF=40LSB for HBR CDR setting */
575			0x04 0x7b 0x00 /* [1:0] Fmin=+4bands */
576			0x04 0x7a 0xfd /* [7:5] DCO_FTRNG=+-40% */
577			/*
578			 * 1.62G CDR settings:
579			 * [5:2]NOF=64LSB [1:0]DCO scale is 2/5
580			 */
581			0x04 0xc0 0x12
582			0x04 0xc1 0x92 /* Gitune=-37% */
583			0x04 0xc2 0x1c /* Fbstep=100% */
584			0x04 0x32 0x80 /* [7] LOS signal disable */
585			/* RPIO Setting */
586			/* [7:4] LVDS driver bias current 75% (250mV swing) */
587			0x04 0x00 0xb0
588			 /* [7:6] Right-bar GPIO output strength is 8mA */
589			0x04 0x15 0x40
590			/* EQ Training State Machine Setting */
591			0x04 0x54 0x10 /* RCO calibration start */
592			/* [4:0] MAX_LANE_COUNT set to one lane */
593			0x01 0x02 0x81
594			/* [4:0] LANE_COUNT_SET set to one lane */
595			0x01 0x21 0x81
596			0x00 0x52 0x20
597			0x00 0xf1 0x03 /* HPD CP toggle enable */
598			0x00 0x62 0x41
599			/* Counter number add 1ms counter delay */
600			0x00 0xf6 0x01
601			/*
602			 * [6]PWM function control by DPCD0040f[7], default
603			 * is PWM block always works
604			 */
605			0x00 0x77 0x06
606			0x00 0x4c 0x04
607			/*
608			 * 04h Adjust VTotal tolerance to fix the 30Hz no-
609			 * display issue
610			 * DPCD00400='h00 Parade OUI = 'h001cf8
611			 */
612			0x01 0xc0 0x00
613			0x01 0xc1 0x1c /* DPCD00401='h1c */
614			0x01 0xc2 0xf8 /* DPCD00402='hf8 */
615			/* DPCD403~408 = ASCII code D2SLV5='h4432534c5635 */
616			0x01 0xc3 0x44
617			0x01 0xc4 0x32 /* DPCD404 */
618			0x01 0xc5 0x53 /* DPCD405 */
619			0x01 0xc6 0x4c /* DPCD406 */
620			0x01 0xc7 0x56 /* DPCD407 */
621			0x01 0xc8 0x35 /* DPCD408 */
622			/* DPCD40A Initial Code major revision '01' */
623			0x01 0xca 0x01
624			/* DPCD40B Initial Code minor revision '05' */
625			0x01 0xcb 0x05
626			0x01 0xa5 0xa0 /* DPCD720, Select internal PWM */
627			/*
628			 * 0xff for 100% PWM of brightness, 0h for 0% brightness
629			 */
630			0x01 0xa7 0x00
631			/*
632			 * Set LVDS output as 6bit-VESA mapping, single LVDS
633			 * channel
634			 */
635			0x01 0xcc 0x13
636			0x02 0xb1 0x20 /* Enable SSC set by register */
637			/* Set SSC enabled and +/-1% central spreading */
638			0x04 0x10 0x16
639			0x04 0x59 0x60 /* MPU Clock source: LC => RCO */
640			0x04 0x54 0x14 /* LC -> RCO */
641			0x02 0xa1 0x91>; /* HPD high */
642		ports {
643			port@0 {
644				bridge_out: endpoint {
645					remote-endpoint = <&panel_in>;
646				};
647			};
648
649			port@1 {
650				bridge_in: endpoint {
651					remote-endpoint = <&dp_out>;
652				};
653			};
654		};
655	};
656
657	max98088: soundcodec@10 {
658		reg = <0x10>;
659		compatible = "maxim,max98088";
660		#sound-dai-cells = <1>;
661	};
662};
663
664#include "cros-ec-keyboard.dtsi"
665