1*e8131386SMugunthan V N/* 2*e8131386SMugunthan V N * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ 3*e8131386SMugunthan V N * 4*e8131386SMugunthan V N * This program is free software; you can redistribute it and/or modify 5*e8131386SMugunthan V N * it under the terms of the GNU General Public License version 2 as 6*e8131386SMugunthan V N * published by the Free Software Foundation. 7*e8131386SMugunthan V N */ 8*e8131386SMugunthan V N#include "dra72-evm-common.dtsi" 9*e8131386SMugunthan V N#include <dt-bindings/net/ti-dp83867.h> 10*e8131386SMugunthan V N 11*e8131386SMugunthan V N/ { 12*e8131386SMugunthan V N model = "TI DRA722 Rev C EVM"; 13*e8131386SMugunthan V N 14*e8131386SMugunthan V N memory { 15*e8131386SMugunthan V N device_type = "memory"; 16*e8131386SMugunthan V N reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */ 17*e8131386SMugunthan V N }; 18*e8131386SMugunthan V N}; 19*e8131386SMugunthan V N 20*e8131386SMugunthan V N&tps65917_regulators { 21*e8131386SMugunthan V N ldo2_reg: ldo2 { 22*e8131386SMugunthan V N /* LDO2_OUT --> VDDA_1V8_PHY2 */ 23*e8131386SMugunthan V N regulator-name = "ldo2"; 24*e8131386SMugunthan V N regulator-min-microvolt = <1800000>; 25*e8131386SMugunthan V N regulator-max-microvolt = <1800000>; 26*e8131386SMugunthan V N regulator-always-on; 27*e8131386SMugunthan V N regulator-boot-on; 28*e8131386SMugunthan V N }; 29*e8131386SMugunthan V N}; 30*e8131386SMugunthan V N 31*e8131386SMugunthan V N&hdmi { 32*e8131386SMugunthan V N vdda_video-supply = <&ldo2_reg>; 33*e8131386SMugunthan V N}; 34*e8131386SMugunthan V N 35*e8131386SMugunthan V N&mac { 36*e8131386SMugunthan V N mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>, 37*e8131386SMugunthan V N <&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */ 38*e8131386SMugunthan V N <&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */ 39*e8131386SMugunthan V N dual_emac; 40*e8131386SMugunthan V N}; 41*e8131386SMugunthan V N 42*e8131386SMugunthan V N&cpsw_emac0 { 43*e8131386SMugunthan V N phy-handle = <&dp83867_0>; 44*e8131386SMugunthan V N phy-mode = "rgmii-id"; 45*e8131386SMugunthan V N dual_emac_res_vlan = <1>; 46*e8131386SMugunthan V N}; 47*e8131386SMugunthan V N 48*e8131386SMugunthan V N&cpsw_emac1 { 49*e8131386SMugunthan V N phy-handle = <&dp83867_1>; 50*e8131386SMugunthan V N phy-mode = "rgmii-id"; 51*e8131386SMugunthan V N dual_emac_res_vlan = <2>; 52*e8131386SMugunthan V N}; 53*e8131386SMugunthan V N 54*e8131386SMugunthan V N&davinci_mdio { 55*e8131386SMugunthan V N dp83867_0: ethernet-phy@2 { 56*e8131386SMugunthan V N reg = <2>; 57*e8131386SMugunthan V N ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; 58*e8131386SMugunthan V N ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; 59*e8131386SMugunthan V N ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; 60*e8131386SMugunthan V N ti,min-output-imepdance; 61*e8131386SMugunthan V N }; 62*e8131386SMugunthan V N 63*e8131386SMugunthan V N dp83867_1: ethernet-phy@3 { 64*e8131386SMugunthan V N reg = <3>; 65*e8131386SMugunthan V N ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; 66*e8131386SMugunthan V N ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; 67*e8131386SMugunthan V N ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; 68*e8131386SMugunthan V N ti,min-output-imepdance; 69*e8131386SMugunthan V N }; 70*e8131386SMugunthan V N}; 71