1e8131386SMugunthan V N/* 2e8131386SMugunthan V N * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ 3e8131386SMugunthan V N * 4e8131386SMugunthan V N * This program is free software; you can redistribute it and/or modify 5e8131386SMugunthan V N * it under the terms of the GNU General Public License version 2 as 6e8131386SMugunthan V N * published by the Free Software Foundation. 7e8131386SMugunthan V N */ 8e8131386SMugunthan V N#include "dra72-evm-common.dtsi" 9e8131386SMugunthan V N#include <dt-bindings/net/ti-dp83867.h> 10e8131386SMugunthan V N 11e8131386SMugunthan V N/ { 12e8131386SMugunthan V N model = "TI DRA722 Rev C EVM"; 13e8131386SMugunthan V N 147aa1a408SLokesh Vutla memory@0 { 15e8131386SMugunthan V N device_type = "memory"; 16e8131386SMugunthan V N reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */ 17e8131386SMugunthan V N }; 18e8131386SMugunthan V N}; 19e8131386SMugunthan V N 207aa1a408SLokesh Vutla&i2c1 { 217aa1a408SLokesh Vutla tps65917: tps65917@58 { 227aa1a408SLokesh Vutla reg = <0x58>; 237aa1a408SLokesh Vutla 247aa1a408SLokesh Vutla interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */ 25e8131386SMugunthan V N }; 26e8131386SMugunthan V N}; 27e8131386SMugunthan V N 287aa1a408SLokesh Vutla#include "dra72-evm-tps65917.dtsi" 297aa1a408SLokesh Vutla 307aa1a408SLokesh Vutla&ldo2_reg { 317aa1a408SLokesh Vutla /* LDO2_OUT --> VDDA_1V8_PHY2 */ 327aa1a408SLokesh Vutla regulator-always-on; 337aa1a408SLokesh Vutla regulator-boot-on; 347aa1a408SLokesh Vutla}; 357aa1a408SLokesh Vutla 36e8131386SMugunthan V N&hdmi { 377aa1a408SLokesh Vutla vdda-supply = <&ldo2_reg>; 387aa1a408SLokesh Vutla}; 397aa1a408SLokesh Vutla 407aa1a408SLokesh Vutla&pcf_gpio_21 { 417aa1a408SLokesh Vutla interrupt-parent = <&gpio3>; 427aa1a408SLokesh Vutla interrupts = <30 IRQ_TYPE_EDGE_FALLING>; 43e8131386SMugunthan V N}; 44e8131386SMugunthan V N 45e8131386SMugunthan V N&mac { 46e8131386SMugunthan V N mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>, 47e8131386SMugunthan V N <&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */ 48e8131386SMugunthan V N <&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */ 49e8131386SMugunthan V N dual_emac; 50e8131386SMugunthan V N}; 51e8131386SMugunthan V N 52e8131386SMugunthan V N&cpsw_emac0 { 53e8131386SMugunthan V N phy-handle = <&dp83867_0>; 54e8131386SMugunthan V N phy-mode = "rgmii-id"; 55e8131386SMugunthan V N dual_emac_res_vlan = <1>; 56e8131386SMugunthan V N}; 57e8131386SMugunthan V N 58e8131386SMugunthan V N&cpsw_emac1 { 59e8131386SMugunthan V N phy-handle = <&dp83867_1>; 60e8131386SMugunthan V N phy-mode = "rgmii-id"; 61e8131386SMugunthan V N dual_emac_res_vlan = <2>; 62e8131386SMugunthan V N}; 63e8131386SMugunthan V N 64e8131386SMugunthan V N&davinci_mdio { 65e8131386SMugunthan V N dp83867_0: ethernet-phy@2 { 66e8131386SMugunthan V N reg = <2>; 67e8131386SMugunthan V N ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; 68e8131386SMugunthan V N ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; 69e8131386SMugunthan V N ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; 70*64631700SMugunthan V N ti,min-output-impedance; 71e8131386SMugunthan V N }; 72e8131386SMugunthan V N 73e8131386SMugunthan V N dp83867_1: ethernet-phy@3 { 74e8131386SMugunthan V N reg = <3>; 75e8131386SMugunthan V N ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; 76e8131386SMugunthan V N ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; 77e8131386SMugunthan V N ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; 78*64631700SMugunthan V N ti,min-output-impedance; 79e8131386SMugunthan V N }; 80e8131386SMugunthan V N}; 81