xref: /openbmc/u-boot/arch/arm/dts/ast2600-u-boot.dtsi (revision 1eda014bf7497329d951c6eced4d98fdf6270f53)
1#include <dt-bindings/clock/ast2500-scu.h>
2#include <dt-bindings/reset/ast2500-reset.h>
3
4#include "ast2600.dtsi"
5
6/ {
7	scu: clock-controller@1e6e2000 {
8		compatible = "aspeed,ast2600-scu";
9		reg = <0x1e6e2000 0x1000>;
10		u-boot,dm-pre-reloc;
11		#clock-cells = <1>;
12		#reset-cells = <1>;
13	};
14
15	rst: reset-controller {
16		u-boot,dm-pre-reloc;
17		compatible = "aspeed,ast2600-reset";
18		aspeed,wdt = <&wdt1>;
19		#reset-cells = <1>;
20	};
21
22#if 0
23	sdrammc: sdrammc@1e6e0000 {
24		u-boot,dm-pre-reloc;
25		compatible = "aspeed,ast2500-sdrammc";
26		reg = <0x1e6e0000 0x174
27			0x1e6e0200 0x1d4 >;
28		#reset-cells = <1>;
29		clocks = <&scu PLL_MPLL>;
30		resets = <&rst AST_RESET_SDRAM>;
31	};
32#endif
33	ahb {
34		u-boot,dm-pre-reloc;
35
36		apb {
37			u-boot,dm-pre-reloc;
38		};
39
40	};
41};
42
43&uart1 {
44	clock-frequency = <1846154>;
45};
46
47&uart2 {
48	clock-frequency = <1846154>;
49};
50
51&uart3 {
52	clock-frequency = <1846154>;
53};
54
55&uart4 {
56	clock-frequency = <1846154>;
57};
58
59&uart5 {
60	clock-frequency = <1846154>;
61};
62