1/dts-v1/; 2 3#include "ast2600-u-boot.dtsi" 4 5/ { 6 memory { 7 device_type = "memory"; 8 reg = <0x80000000 0x40000000>; 9 }; 10 11 chosen { 12 stdout-path = &uart5; 13 }; 14 15 aliases { 16 spi0 = &fmc; 17 spi1 = &spi1; 18 spi2 = &spi2; 19 ethernet1 = &mac1; 20 ethernet2 = &mac2; 21 ethernet3 = &mac3; 22 }; 23 24 cpus { 25 cpu@0 { 26 clock-frequency = <800000000>; 27 }; 28 cpu@1 { 29 clock-frequency = <800000000>; 30 }; 31 }; 32}; 33 34&uart5 { 35 u-boot,dm-pre-reloc; 36 status = "okay"; 37}; 38 39&sdrammc { 40 clock-frequency = <400000000>; 41}; 42 43&wdt1 { 44 u-boot,dm-pre-reloc; 45 status = "okay"; 46}; 47 48&wdt2 { 49 u-boot,dm-pre-reloc; 50 status = "okay"; 51}; 52 53&wdt3 { 54 u-boot,dm-pre-reloc; 55 status = "okay"; 56}; 57 58&mdio { 59 status = "okay"; 60}; 61 62#if 0 63&mac0 { 64 status = "okay"; 65 phy-mode = "rgmii"; 66 67 pinctrl-names = "default"; 68 pinctrl-0 = <&pinctrl_mac1link_default &pinctrl_mdio1_default>; 69}; 70#endif 71 72&mac1 { 73 status = "okay"; 74 75 phy-mode = "rgmii"; 76 pinctrl-names = "default"; 77 pinctrl-0 = <&pinctrl_mac2link_default &pinctrl_mdio2_default>; 78}; 79 80&mac2 { 81 status = "okay"; 82 83 phy-mode = "rgmii"; 84 pinctrl-names = "default"; 85 pinctrl-0 = <&pinctrl_mac3link_default &pinctrl_mdio3_default>; 86}; 87 88&mac3 { 89 status = "okay"; 90 91 phy-mode = "rgmii"; 92 pinctrl-names = "default"; 93 pinctrl-0 = <&pinctrl_mac4link_default &pinctrl_mdio4_default>; 94}; 95 96&fmc { 97 status = "okay"; 98#if 0 99 pinctrl-names = "default"; 100 pinctrl-0 = <&pinctrl_fmcquad_default>; 101#endif 102 flash@0 { 103 compatible = "spi-flash", "sst,w25q256"; 104 status = "okay"; 105 spi-max-frequency = <50000000>; 106 spi-tx-bus-width = <2>; 107 spi-rx-bus-width = <2>; 108 }; 109 110 flash@1 { 111 compatible = "spi-flash", "sst,w25q256"; 112 status = "okay"; 113 spi-max-frequency = <50000000>; 114 spi-tx-bus-width = <2>; 115 spi-rx-bus-width = <2>; 116 }; 117 118 flash@2 { 119 compatible = "spi-flash", "sst,w25q256"; 120 status = "okay"; 121 spi-max-frequency = <50000000>; 122 spi-tx-bus-width = <2>; 123 spi-rx-bus-width = <2>; 124 }; 125}; 126 127&spi1 { 128 status = "okay"; 129 130 pinctrl-names = "default"; 131 pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default 132 &pinctrl_spi1cs1_default &pinctrl_spi1wp_default 133 &pinctrl_spi1wp_default>; 134 135 flash@0 { 136 compatible = "spi-flash", "sst,w25q256"; 137 status = "okay"; 138 spi-max-frequency = <50000000>; 139 spi-tx-bus-width = <2>; 140 spi-rx-bus-width = <2>; 141 }; 142 143 flash@1 { 144 compatible = "spi-flash", "sst,w25q256"; 145 status = "okay"; 146 spi-max-frequency = <50000000>; 147 spi-tx-bus-width = <2>; 148 spi-rx-bus-width = <2>; 149 }; 150}; 151 152&spi2 { 153 status = "okay"; 154 155 pinctrl-names = "default"; 156 pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default 157 &pinctrl_spi2cs2_default &pinctrl_spi2quad_default>; 158 159 flash@0 { 160 compatible = "spi-flash", "sst,w25q256"; 161 status = "okay"; 162 spi-max-frequency = <50000000>; 163 spi-tx-bus-width = <2>; 164 spi-rx-bus-width = <2>; 165 }; 166 167 flash@1 { 168 compatible = "spi-flash", "sst,w25q256"; 169 status = "okay"; 170 spi-max-frequency = <50000000>; 171 spi-tx-bus-width = <2>; 172 spi-rx-bus-width = <2>; 173 }; 174 175 flash@2 { 176 compatible = "spi-flash", "sst,w25q256"; 177 status = "okay"; 178 spi-max-frequency = <50000000>; 179 spi-tx-bus-width = <2>; 180 spi-rx-bus-width = <2>; 181 }; 182}; 183 184&emmc_slot0 { 185 status = "okay"; 186 bus-width = <4>; 187 pinctrl-names = "default"; 188 pinctrl-0 = <&pinctrl_emmc_default>; 189}; 190 191#if 0 192&sdhci_slot0 { 193 status = "okay"; 194 bus-width = <4>; 195 pwr-gpios = <&gpio0 ASPEED_GPIO(V, 0) GPIO_ACTIVE_HIGH>; 196 pwr-sw-gpios = <&gpio0 ASPEED_GPIO(V, 1) GPIO_ACTIVE_HIGH>; 197 pinctrl-names = "default"; 198 pinctrl-0 = <&pinctrl_sd1_default>; 199}; 200 201&sdhci_slot1 { 202 status = "okay"; 203 bus-width = <4>; 204 pwr-gpios = <&gpio0 ASPEED_GPIO(V, 2) GPIO_ACTIVE_HIGH>; 205 pwr-sw-gpios = <&gpio0 ASPEED_GPIO(V, 3) GPIO_ACTIVE_HIGH>; 206 pinctrl-names = "default"; 207 pinctrl-0 = <&pinctrl_sd2_default>; 208}; 209#endif 210 211&i2c4 { 212 status = "okay"; 213 214 pinctrl-names = "default"; 215 pinctrl-0 = <&pinctrl_i2c5_default>; 216}; 217 218&i2c5 { 219 status = "okay"; 220 221 pinctrl-names = "default"; 222 pinctrl-0 = <&pinctrl_i2c6_default>; 223}; 224 225&i2c6 { 226 status = "okay"; 227 228 pinctrl-names = "default"; 229 pinctrl-0 = <&pinctrl_i2c7_default>; 230}; 231 232&i2c7 { 233 status = "okay"; 234 235 pinctrl-names = "default"; 236 pinctrl-0 = <&pinctrl_i2c8_default>; 237}; 238 239&i2c8 { 240 status = "okay"; 241 242 pinctrl-names = "default"; 243 pinctrl-0 = <&pinctrl_i2c9_default>; 244}; 245 246#if 0 247&pcie_bridge1 { 248 status = "okay"; 249}; 250 251&h2x { 252 status = "okay"; 253}; 254#endif 255