xref: /openbmc/u-boot/arch/arm/dts/ast2500-u-boot.dtsi (revision 39f945044093f09ddac1bf68b07eaaf55769d6ac)
1 #include <dt-bindings/clock/ast2500-clock.h>
2 #include <dt-bindings/reset/ast2500-reset.h>
3 
4 #include "ast2500.dtsi"
5 
6 / {
7 	scu: clock-controller@1e6e2000 {
8 		compatible = "aspeed,ast2500-scu";
9 		reg = <0x1e6e2000 0x1000>;
10 		u-boot,dm-pre-reloc;
11 		#clock-cells = <1>;
12 		#reset-cells = <1>;
13 	};
14 
15 	rst: reset-controller {
16 		u-boot,dm-pre-reloc;
17 		compatible = "aspeed,ast2500-reset";
18 		aspeed,wdt = <&wdt1>;
19 		#reset-cells = <1>;
20 	};
21 
22 	sdrammc: sdrammc@1e6e0000 {
23 		u-boot,dm-pre-reloc;
24 		compatible = "aspeed,ast2500-sdrammc";
25 		reg = <0x1e6e0000 0x174
26 			0x1e6e0200 0x1d4 >;
27 		#reset-cells = <1>;
28 		clocks = <&scu ASPEED_CLK_MPLL>;
29 		resets = <&rst ASPEED_RESET_SDRAM>;
30 	};
31 
32 	ahb {
33 		u-boot,dm-pre-reloc;
34 
35 		apb {
36 			u-boot,dm-pre-reloc;
37 		};
38 
39 	};
40 };
41 
42 &timer {
43 	u-boot,dm-pre-reloc;
44 };
45 
46 &i2c_ic {
47 	resets = <&rst ASPEED_RESET_I2C>;
48 };
49