1*aefb8f4cSPhil Sutter/* 2*aefb8f4cSPhil Sutter * Device Tree file for Synology DS414 3*aefb8f4cSPhil Sutter * 4*aefb8f4cSPhil Sutter * Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org> 5*aefb8f4cSPhil Sutter * 6*aefb8f4cSPhil Sutter * This program is free software; you can redistribute it and/or 7*aefb8f4cSPhil Sutter * modify it under the terms of the GNU General Public License 8*aefb8f4cSPhil Sutter * as published by the Free Software Foundation; either version 9*aefb8f4cSPhil Sutter * 2 of the License, or (at your option) any later version. 10*aefb8f4cSPhil Sutter * 11*aefb8f4cSPhil Sutter * Note: this Device Tree assumes that the bootloader has remapped the 12*aefb8f4cSPhil Sutter * internal registers to 0xf1000000 (instead of the old 0xd0000000). 13*aefb8f4cSPhil Sutter * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot 14*aefb8f4cSPhil Sutter * bootloaders provided by Marvell. It is used in recent versions of 15*aefb8f4cSPhil Sutter * DSM software provided by Synology. Nonetheless, some earlier boards 16*aefb8f4cSPhil Sutter * were delivered with an older version of u-boot that left internal 17*aefb8f4cSPhil Sutter * registers mapped at 0xd0000000. If you have such a device you will 18*aefb8f4cSPhil Sutter * not be able to directly boot a kernel based on this Device Tree. In 19*aefb8f4cSPhil Sutter * that case, the preferred solution is to update your bootloader (e.g. 20*aefb8f4cSPhil Sutter * by upgrading to latest version of DSM, or building a new one and 21*aefb8f4cSPhil Sutter * installing it from u-boot prompt) or adjust the Devive Tree 22*aefb8f4cSPhil Sutter * (s/0xf1000000/0xd0000000/ in 'ranges' below). 23*aefb8f4cSPhil Sutter */ 24*aefb8f4cSPhil Sutter 25*aefb8f4cSPhil Sutter/dts-v1/; 26*aefb8f4cSPhil Sutter 27*aefb8f4cSPhil Sutter#include <dt-bindings/input/input.h> 28*aefb8f4cSPhil Sutter#include <dt-bindings/gpio/gpio.h> 29*aefb8f4cSPhil Sutter#include "armada-xp-mv78230.dtsi" 30*aefb8f4cSPhil Sutter 31*aefb8f4cSPhil Sutter/ { 32*aefb8f4cSPhil Sutter model = "Synology DS414"; 33*aefb8f4cSPhil Sutter compatible = "synology,ds414", "marvell,armadaxp-mv78230", 34*aefb8f4cSPhil Sutter "marvell,armadaxp", "marvell,armada-370-xp"; 35*aefb8f4cSPhil Sutter 36*aefb8f4cSPhil Sutter chosen { 37*aefb8f4cSPhil Sutter bootargs = "console=ttyS0,115200 earlyprintk"; 38*aefb8f4cSPhil Sutter stdout-path = &uart0; 39*aefb8f4cSPhil Sutter }; 40*aefb8f4cSPhil Sutter 41*aefb8f4cSPhil Sutter aliases { 42*aefb8f4cSPhil Sutter spi0 = &spi0; 43*aefb8f4cSPhil Sutter }; 44*aefb8f4cSPhil Sutter 45*aefb8f4cSPhil Sutter memory { 46*aefb8f4cSPhil Sutter device_type = "memory"; 47*aefb8f4cSPhil Sutter reg = <0 0x00000000 0 0x40000000>; /* 1GB */ 48*aefb8f4cSPhil Sutter }; 49*aefb8f4cSPhil Sutter 50*aefb8f4cSPhil Sutter soc { 51*aefb8f4cSPhil Sutter ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 52*aefb8f4cSPhil Sutter MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; 53*aefb8f4cSPhil Sutter 54*aefb8f4cSPhil Sutter pcie-controller { 55*aefb8f4cSPhil Sutter status = "okay"; 56*aefb8f4cSPhil Sutter 57*aefb8f4cSPhil Sutter /* 58*aefb8f4cSPhil Sutter * Connected to Marvell 88SX7042 SATA-II controller 59*aefb8f4cSPhil Sutter * handling the four disks. 60*aefb8f4cSPhil Sutter */ 61*aefb8f4cSPhil Sutter pcie@1,0 { 62*aefb8f4cSPhil Sutter /* Port 0, Lane 0 */ 63*aefb8f4cSPhil Sutter status = "okay"; 64*aefb8f4cSPhil Sutter }; 65*aefb8f4cSPhil Sutter 66*aefb8f4cSPhil Sutter /* 67*aefb8f4cSPhil Sutter * Connected to EtronTech EJ168A XHCI controller 68*aefb8f4cSPhil Sutter * providing the two rear USB 3.0 ports. 69*aefb8f4cSPhil Sutter */ 70*aefb8f4cSPhil Sutter pcie@5,0 { 71*aefb8f4cSPhil Sutter /* Port 1, Lane 0 */ 72*aefb8f4cSPhil Sutter status = "okay"; 73*aefb8f4cSPhil Sutter }; 74*aefb8f4cSPhil Sutter }; 75*aefb8f4cSPhil Sutter 76*aefb8f4cSPhil Sutter internal-regs { 77*aefb8f4cSPhil Sutter 78*aefb8f4cSPhil Sutter /* RTC is provided by Seiko S-35390A below */ 79*aefb8f4cSPhil Sutter rtc@10300 { 80*aefb8f4cSPhil Sutter status = "disabled"; 81*aefb8f4cSPhil Sutter }; 82*aefb8f4cSPhil Sutter 83*aefb8f4cSPhil Sutter spi0: spi@10600 { 84*aefb8f4cSPhil Sutter status = "okay"; 85*aefb8f4cSPhil Sutter u-boot,dm-pre-reloc; 86*aefb8f4cSPhil Sutter 87*aefb8f4cSPhil Sutter spi-flash@0 { 88*aefb8f4cSPhil Sutter u-boot,dm-pre-reloc; 89*aefb8f4cSPhil Sutter #address-cells = <1>; 90*aefb8f4cSPhil Sutter #size-cells = <1>; 91*aefb8f4cSPhil Sutter compatible = "micron,n25q064"; 92*aefb8f4cSPhil Sutter reg = <0>; /* Chip select 0 */ 93*aefb8f4cSPhil Sutter spi-max-frequency = <20000000>; 94*aefb8f4cSPhil Sutter 95*aefb8f4cSPhil Sutter /* 96*aefb8f4cSPhil Sutter * Warning! 97*aefb8f4cSPhil Sutter * 98*aefb8f4cSPhil Sutter * Synology u-boot uses its compiled-in environment 99*aefb8f4cSPhil Sutter * and it seems Synology did not care to change u-boot 100*aefb8f4cSPhil Sutter * default configuration in order to allow saving a 101*aefb8f4cSPhil Sutter * modified environment at a sensible location. So, 102*aefb8f4cSPhil Sutter * if you do a 'saveenv' under u-boot, your modified 103*aefb8f4cSPhil Sutter * environment will be saved at 1MB after the start 104*aefb8f4cSPhil Sutter * of the flash, i.e. in the middle of the uImage. 105*aefb8f4cSPhil Sutter * For that reason, it is strongly advised not to 106*aefb8f4cSPhil Sutter * change the default environment, unless you know 107*aefb8f4cSPhil Sutter * what you are doing. 108*aefb8f4cSPhil Sutter */ 109*aefb8f4cSPhil Sutter partition@00000000 { /* u-boot */ 110*aefb8f4cSPhil Sutter label = "RedBoot"; 111*aefb8f4cSPhil Sutter reg = <0x00000000 0x000d0000>; /* 832KB */ 112*aefb8f4cSPhil Sutter }; 113*aefb8f4cSPhil Sutter 114*aefb8f4cSPhil Sutter partition@000c0000 { /* uImage */ 115*aefb8f4cSPhil Sutter label = "zImage"; 116*aefb8f4cSPhil Sutter reg = <0x000d0000 0x002d0000>; /* 2880KB */ 117*aefb8f4cSPhil Sutter }; 118*aefb8f4cSPhil Sutter 119*aefb8f4cSPhil Sutter partition@003a0000 { /* uInitramfs */ 120*aefb8f4cSPhil Sutter label = "rd.gz"; 121*aefb8f4cSPhil Sutter reg = <0x003a0000 0x00430000>; /* 4250KB */ 122*aefb8f4cSPhil Sutter }; 123*aefb8f4cSPhil Sutter 124*aefb8f4cSPhil Sutter partition@007d0000 { /* MAC address and serial number */ 125*aefb8f4cSPhil Sutter label = "vendor"; 126*aefb8f4cSPhil Sutter reg = <0x007d0000 0x00010000>; /* 64KB */ 127*aefb8f4cSPhil Sutter }; 128*aefb8f4cSPhil Sutter 129*aefb8f4cSPhil Sutter partition@007e0000 { 130*aefb8f4cSPhil Sutter label = "RedBoot config"; 131*aefb8f4cSPhil Sutter reg = <0x007e0000 0x00010000>; /* 64KB */ 132*aefb8f4cSPhil Sutter }; 133*aefb8f4cSPhil Sutter 134*aefb8f4cSPhil Sutter partition@007f0000 { 135*aefb8f4cSPhil Sutter label = "FIS directory"; 136*aefb8f4cSPhil Sutter reg = <0x007f0000 0x00010000>; /* 64KB */ 137*aefb8f4cSPhil Sutter }; 138*aefb8f4cSPhil Sutter }; 139*aefb8f4cSPhil Sutter }; 140*aefb8f4cSPhil Sutter 141*aefb8f4cSPhil Sutter i2c@11000 { 142*aefb8f4cSPhil Sutter clock-frequency = <400000>; 143*aefb8f4cSPhil Sutter status = "okay"; 144*aefb8f4cSPhil Sutter 145*aefb8f4cSPhil Sutter s35390a: s35390a@30 { 146*aefb8f4cSPhil Sutter compatible = "sii,s35390a"; 147*aefb8f4cSPhil Sutter reg = <0x30>; 148*aefb8f4cSPhil Sutter }; 149*aefb8f4cSPhil Sutter }; 150*aefb8f4cSPhil Sutter 151*aefb8f4cSPhil Sutter /* Connected to a header on device's PCB. This 152*aefb8f4cSPhil Sutter * provides the main console for the device. 153*aefb8f4cSPhil Sutter * 154*aefb8f4cSPhil Sutter * Warning: the device may not boot with a 3.3V 155*aefb8f4cSPhil Sutter * USB-serial converter connected when the power 156*aefb8f4cSPhil Sutter * button is pressed. The converter needs to be 157*aefb8f4cSPhil Sutter * connected a few seconds after pressing the 158*aefb8f4cSPhil Sutter * power button. This is possibly due to UART0_TXD 159*aefb8f4cSPhil Sutter * pin being sampled at reset (bit 0 of SAR). 160*aefb8f4cSPhil Sutter */ 161*aefb8f4cSPhil Sutter serial@12000 { 162*aefb8f4cSPhil Sutter status = "okay"; 163*aefb8f4cSPhil Sutter u-boot,dm-pre-reloc; 164*aefb8f4cSPhil Sutter }; 165*aefb8f4cSPhil Sutter 166*aefb8f4cSPhil Sutter /* Connected to a Microchip PIC16F883 for power control */ 167*aefb8f4cSPhil Sutter serial@12100 { 168*aefb8f4cSPhil Sutter status = "okay"; 169*aefb8f4cSPhil Sutter }; 170*aefb8f4cSPhil Sutter 171*aefb8f4cSPhil Sutter poweroff@12100 { 172*aefb8f4cSPhil Sutter compatible = "synology,power-off"; 173*aefb8f4cSPhil Sutter reg = <0x12100 0x100>; 174*aefb8f4cSPhil Sutter clocks = <&coreclk 0>; 175*aefb8f4cSPhil Sutter }; 176*aefb8f4cSPhil Sutter 177*aefb8f4cSPhil Sutter /* Front USB 2.0 port */ 178*aefb8f4cSPhil Sutter usb@50000 { 179*aefb8f4cSPhil Sutter status = "okay"; 180*aefb8f4cSPhil Sutter }; 181*aefb8f4cSPhil Sutter 182*aefb8f4cSPhil Sutter mdio { 183*aefb8f4cSPhil Sutter phy0: ethernet-phy@0 { /* Marvell 88E1512 */ 184*aefb8f4cSPhil Sutter reg = <0>; 185*aefb8f4cSPhil Sutter }; 186*aefb8f4cSPhil Sutter 187*aefb8f4cSPhil Sutter phy1: ethernet-phy@1 { /* Marvell 88E1512 */ 188*aefb8f4cSPhil Sutter reg = <1>; 189*aefb8f4cSPhil Sutter }; 190*aefb8f4cSPhil Sutter }; 191*aefb8f4cSPhil Sutter 192*aefb8f4cSPhil Sutter ethernet@70000 { 193*aefb8f4cSPhil Sutter status = "okay"; 194*aefb8f4cSPhil Sutter pinctrl-0 = <&ge0_rgmii_pins>; 195*aefb8f4cSPhil Sutter pinctrl-names = "default"; 196*aefb8f4cSPhil Sutter phy = <&phy1>; 197*aefb8f4cSPhil Sutter phy-mode = "rgmii-id"; 198*aefb8f4cSPhil Sutter }; 199*aefb8f4cSPhil Sutter 200*aefb8f4cSPhil Sutter ethernet@74000 { 201*aefb8f4cSPhil Sutter pinctrl-0 = <&ge1_rgmii_pins>; 202*aefb8f4cSPhil Sutter pinctrl-names = "default"; 203*aefb8f4cSPhil Sutter status = "okay"; 204*aefb8f4cSPhil Sutter phy = <&phy0>; 205*aefb8f4cSPhil Sutter phy-mode = "rgmii-id"; 206*aefb8f4cSPhil Sutter }; 207*aefb8f4cSPhil Sutter }; 208*aefb8f4cSPhil Sutter }; 209*aefb8f4cSPhil Sutter 210*aefb8f4cSPhil Sutter regulators { 211*aefb8f4cSPhil Sutter compatible = "simple-bus"; 212*aefb8f4cSPhil Sutter #address-cells = <1>; 213*aefb8f4cSPhil Sutter #size-cells = <0>; 214*aefb8f4cSPhil Sutter pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin 215*aefb8f4cSPhil Sutter &sata3_pwr_pin &sata4_pwr_pin>; 216*aefb8f4cSPhil Sutter pinctrl-names = "default"; 217*aefb8f4cSPhil Sutter 218*aefb8f4cSPhil Sutter sata1_regulator: sata1-regulator { 219*aefb8f4cSPhil Sutter compatible = "regulator-fixed"; 220*aefb8f4cSPhil Sutter reg = <1>; 221*aefb8f4cSPhil Sutter regulator-name = "SATA1 Power"; 222*aefb8f4cSPhil Sutter regulator-min-microvolt = <5000000>; 223*aefb8f4cSPhil Sutter regulator-max-microvolt = <5000000>; 224*aefb8f4cSPhil Sutter startup-delay-us = <2000000>; 225*aefb8f4cSPhil Sutter enable-active-high; 226*aefb8f4cSPhil Sutter regulator-always-on; 227*aefb8f4cSPhil Sutter regulator-boot-on; 228*aefb8f4cSPhil Sutter gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>; 229*aefb8f4cSPhil Sutter }; 230*aefb8f4cSPhil Sutter 231*aefb8f4cSPhil Sutter sata2_regulator: sata2-regulator { 232*aefb8f4cSPhil Sutter compatible = "regulator-fixed"; 233*aefb8f4cSPhil Sutter reg = <2>; 234*aefb8f4cSPhil Sutter regulator-name = "SATA2 Power"; 235*aefb8f4cSPhil Sutter regulator-min-microvolt = <5000000>; 236*aefb8f4cSPhil Sutter regulator-max-microvolt = <5000000>; 237*aefb8f4cSPhil Sutter startup-delay-us = <4000000>; 238*aefb8f4cSPhil Sutter enable-active-high; 239*aefb8f4cSPhil Sutter regulator-always-on; 240*aefb8f4cSPhil Sutter regulator-boot-on; 241*aefb8f4cSPhil Sutter gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; 242*aefb8f4cSPhil Sutter }; 243*aefb8f4cSPhil Sutter 244*aefb8f4cSPhil Sutter sata3_regulator: sata3-regulator { 245*aefb8f4cSPhil Sutter compatible = "regulator-fixed"; 246*aefb8f4cSPhil Sutter reg = <3>; 247*aefb8f4cSPhil Sutter regulator-name = "SATA3 Power"; 248*aefb8f4cSPhil Sutter regulator-min-microvolt = <5000000>; 249*aefb8f4cSPhil Sutter regulator-max-microvolt = <5000000>; 250*aefb8f4cSPhil Sutter startup-delay-us = <6000000>; 251*aefb8f4cSPhil Sutter enable-active-high; 252*aefb8f4cSPhil Sutter regulator-always-on; 253*aefb8f4cSPhil Sutter regulator-boot-on; 254*aefb8f4cSPhil Sutter gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>; 255*aefb8f4cSPhil Sutter }; 256*aefb8f4cSPhil Sutter 257*aefb8f4cSPhil Sutter sata4_regulator: sata4-regulator { 258*aefb8f4cSPhil Sutter compatible = "regulator-fixed"; 259*aefb8f4cSPhil Sutter reg = <4>; 260*aefb8f4cSPhil Sutter regulator-name = "SATA4 Power"; 261*aefb8f4cSPhil Sutter regulator-min-microvolt = <5000000>; 262*aefb8f4cSPhil Sutter regulator-max-microvolt = <5000000>; 263*aefb8f4cSPhil Sutter startup-delay-us = <8000000>; 264*aefb8f4cSPhil Sutter enable-active-high; 265*aefb8f4cSPhil Sutter regulator-always-on; 266*aefb8f4cSPhil Sutter regulator-boot-on; 267*aefb8f4cSPhil Sutter gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; 268*aefb8f4cSPhil Sutter }; 269*aefb8f4cSPhil Sutter }; 270*aefb8f4cSPhil Sutter}; 271*aefb8f4cSPhil Sutter 272*aefb8f4cSPhil Sutter&pinctrl { 273*aefb8f4cSPhil Sutter sata1_pwr_pin: sata1-pwr-pin { 274*aefb8f4cSPhil Sutter marvell,pins = "mpp42"; 275*aefb8f4cSPhil Sutter marvell,function = "gpio"; 276*aefb8f4cSPhil Sutter }; 277*aefb8f4cSPhil Sutter 278*aefb8f4cSPhil Sutter sata2_pwr_pin: sata2-pwr-pin { 279*aefb8f4cSPhil Sutter marvell,pins = "mpp44"; 280*aefb8f4cSPhil Sutter marvell,function = "gpio"; 281*aefb8f4cSPhil Sutter }; 282*aefb8f4cSPhil Sutter 283*aefb8f4cSPhil Sutter sata3_pwr_pin: sata3-pwr-pin { 284*aefb8f4cSPhil Sutter marvell,pins = "mpp45"; 285*aefb8f4cSPhil Sutter marvell,function = "gpio"; 286*aefb8f4cSPhil Sutter }; 287*aefb8f4cSPhil Sutter 288*aefb8f4cSPhil Sutter sata4_pwr_pin: sata4-pwr-pin { 289*aefb8f4cSPhil Sutter marvell,pins = "mpp46"; 290*aefb8f4cSPhil Sutter marvell,function = "gpio"; 291*aefb8f4cSPhil Sutter }; 292*aefb8f4cSPhil Sutter 293*aefb8f4cSPhil Sutter sata1_pres_pin: sata1-pres-pin { 294*aefb8f4cSPhil Sutter marvell,pins = "mpp34"; 295*aefb8f4cSPhil Sutter marvell,function = "gpio"; 296*aefb8f4cSPhil Sutter }; 297*aefb8f4cSPhil Sutter 298*aefb8f4cSPhil Sutter sata2_pres_pin: sata2-pres-pin { 299*aefb8f4cSPhil Sutter marvell,pins = "mpp35"; 300*aefb8f4cSPhil Sutter marvell,function = "gpio"; 301*aefb8f4cSPhil Sutter }; 302*aefb8f4cSPhil Sutter 303*aefb8f4cSPhil Sutter sata3_pres_pin: sata3-pres-pin { 304*aefb8f4cSPhil Sutter marvell,pins = "mpp40"; 305*aefb8f4cSPhil Sutter marvell,function = "gpio"; 306*aefb8f4cSPhil Sutter }; 307*aefb8f4cSPhil Sutter 308*aefb8f4cSPhil Sutter sata4_pres_pin: sata4-pres-pin { 309*aefb8f4cSPhil Sutter marvell,pins = "mpp41"; 310*aefb8f4cSPhil Sutter marvell,function = "gpio"; 311*aefb8f4cSPhil Sutter }; 312*aefb8f4cSPhil Sutter 313*aefb8f4cSPhil Sutter syno_id_bit0_pin: syno-id-bit0-pin { 314*aefb8f4cSPhil Sutter marvell,pins = "mpp26"; 315*aefb8f4cSPhil Sutter marvell,function = "gpio"; 316*aefb8f4cSPhil Sutter }; 317*aefb8f4cSPhil Sutter 318*aefb8f4cSPhil Sutter syno_id_bit1_pin: syno-id-bit1-pin { 319*aefb8f4cSPhil Sutter marvell,pins = "mpp28"; 320*aefb8f4cSPhil Sutter marvell,function = "gpio"; 321*aefb8f4cSPhil Sutter }; 322*aefb8f4cSPhil Sutter 323*aefb8f4cSPhil Sutter syno_id_bit2_pin: syno-id-bit2-pin { 324*aefb8f4cSPhil Sutter marvell,pins = "mpp29"; 325*aefb8f4cSPhil Sutter marvell,function = "gpio"; 326*aefb8f4cSPhil Sutter }; 327*aefb8f4cSPhil Sutter 328*aefb8f4cSPhil Sutter fan1_alarm_pin: fan1-alarm-pin { 329*aefb8f4cSPhil Sutter marvell,pins = "mpp33"; 330*aefb8f4cSPhil Sutter marvell,function = "gpio"; 331*aefb8f4cSPhil Sutter }; 332*aefb8f4cSPhil Sutter 333*aefb8f4cSPhil Sutter fan2_alarm_pin: fan2-alarm-pin { 334*aefb8f4cSPhil Sutter marvell,pins = "mpp32"; 335*aefb8f4cSPhil Sutter marvell,function = "gpio"; 336*aefb8f4cSPhil Sutter }; 337*aefb8f4cSPhil Sutter}; 338